CNRS AW2ETH is a development board based on the ESP32 microcontroller using XTENSA architecture.
This board features a maximum CPU frequency of 240 MHz and 4MB flash memory.
About CNRS AW2ETH
ESP32 board with Ethernet and sensor support - developed for academic and industrial automation projects.
CNRS AW2ETH Technical Specifications
🛰️ Connectivity
🧠 Microcontroller
✨ Features
- 40 digital IO pins
- 16 external interrupt pins
- 16 analog input pins
- 16 PWM pins
CNRS AW2ETH Pin Mappings
Below you can find the CNRS AW2ETH pinout. This development board provides 40 digital IO pins, out of which 16 can be used as external interrupt pins, 16 as analog input pins and 16 pins have Pulse-Width Modulation (PWM).
| Pin | Analog | Touch | PWM | Other |
|---|---|---|---|---|
| 0 | A11 | T1 | ||
| 1 | PWM | TX | ||
| 2 | A12 | T2 | PWM | |
| 3 | PWM | RX | ||
| 4 | A10 | T0 | PWM | SCK |
| 5 | PWM | SS | ||
| 9 | PWM | SDA | ||
| 10 | PWM | SCL | ||
| 12 | A15 | T5 | PWM | |
| 13 | A14 | T4 | PWM | MISO |
| 14 | A16 | T6 | PWM | MOSI |
| 15 | A13 | T3 | PWM | |
| 25 | A18 | PWM | DAC1 | |
| 26 | A19 | PWM | DAC2 | |
| 27 | A17 | T7 | PWM | |
| 32 | A4 | T9 | PWM | |
| 33 | A5 | T8 | PWM | |
| 34 | A6 | |||
| 35 | A7 | |||
| 36 | A0 | |||
| 39 | A3 |
Default Tools for CNRS AW2ETH
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x1000 |
| Flash mode | dio |
| Boot mode | dio |
| Maximum upload size | 1280 Kb (1310720 B) |
| Maximum data size | 320 Kb (327680 B) |
The CNRS AW2ETH development board by default uses esptool_py uploader tool, network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x1000". Flash mode and boot mode for CNRS AW2ETH development board by default is dio and dio respectively.
