CYD ESP32-2424S012 Development Board

Code name: CYD_ESP32_2424S012

CYD ESP32-2424S012 development board is based on esp32c3 microcontroller and uses xtensa architecture. This board has a maximum CPU frequency of 240 MHz and a flash size of 32Mbit.

About CYD ESP32-2424S012

πŸš€ The CYD ESP32-2424S012 is a budget-friendly ESP32-based development board, commonly referred to as a Cheap Yellow Display (CYD). It features integrated WiFi, Bluetooth 4.2, and a range of I/O interfaces, making it an excellent choice for affordable IoT and embedded display projects. ⚑

πŸ“‘ With support for 802.11 B/G/N WiFi and Bluetooth 4.2 (BLE), this board is well-suited for wireless applications.

πŸ’Ύ Equipped with 32Mbit SPI Flash, multiple ADC, DAC, I2C, SPI, UART, PWM, and I2S interfaces, it offers a versatile platform for various embedded projects.

Where to Buy

CYD ESP32-2424S012

Starting from

$20 per unit

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Technical Specifications

πŸ–₯️ Display

Type None

πŸ›°οΈ Connectivity

WiFi 802.11 b/g/n (2.4 GHz)
Bluetooth 5.0
BLE 5.0

🧠 Microcontroller

Model esp32c3
Clock Speed 240 MHz
Flash Size 32Mbit
PSRAM Size None
Architecture xtensa

✨ Features

  • 21 digital IO pins
  • 22 external interrupt pins
  • 6 analog input pins
  • 14 PWM pins

CYD ESP32-2424S012 Dimensions

Width 37.0 mm
Length 38.5 mm

CYD ESP32-2424S012 Pinout

βœ… Safe Pins to Use

For general GPIO usage, these are the safest and most flexible choices:

πŸ”Ή IO1
πŸ”Ή IO3
πŸ”Ή IO22

Why Are These Pins Safe?

  • Not involved in bootstrapping β†’ No impact on device boot mode or system startup
  • Not linked to flash memory or PSRAM β†’ Won't interfere with storage or memory access
  • Not dedicated to USB or JTAG β†’ Free for general use without affecting debugging
  • No special hardware connections β†’ Freely assignable without internal conflicts

⚠️ Pins to Avoid or Use with Caution

Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage.

Critical Pin Categories:

  • πŸ› οΈ Strapping Pins: Control boot behavior and flash voltage selection
  • πŸ”— JTAG Debugging Pins: Required for low-level debugging
  • πŸ”Œ USB Communication Pins: Used for USB Serial/JTAG communication
  • ⚑ Flash Memory & SPI Pins: Connected to SPI flash memory and PSRAM
  • πŸ“‘ UART Serial Communication Pins: Used for debugging and firmware uploads
PINLabelReasonFunction
IO2GPIO2Must be held high during boot (if low on reset, normal flash boot may fail)πŸ› οΈ Strapping
IO16SPIDUsed for SPI flash data transfer (data-out from flash); not available for other functions⚑ Flash
IO17SPIQUsed for SPI flash data transfer (data-in to flash); not available for other functions⚑ Flash
IO18USB_D-By default connected to on-chip USB Serial/JTAG controller; to use as GPIO it must be reconfigured from its USB functionπŸ”Œ USB
IO19USB_D+By default connected to on-chip USB Serial/JTAG controller; not available for GPIO use unless USB functionality is disabled or remappedπŸ”Œ USB

CYD ESP32-2424S012 Pin Mappings

This development board provides 21 digital IO pins, out of which 22 can be used as external interrupt pins , 6 as analog input pins and 14 pins have Pulse-Width Modulation (PWM) .

PinFunctionESP PinInput/OutputDescription
13V33.3VPOWER OUTPUT3.3V power output
2GNDGNDPOWER GROUNDGround connection
35V5VPOWER INPUT5V power input
4IO1GPIO1BIDIRECTIONALGPIO, ADC, I2C
5IO2GPIO2BIDIRECTIONALGPIO, ADC
6IO3GPIO3BIDIRECTIONALGPIO, ADC
7IO16SPI_CSBIDIRECTIONALGPIO, SPI Chip Select
8IO17SPI_DBIDIRECTIONALGPIO, SPI Data
9IO18SPI_CLKBIDIRECTIONALGPIO, SPI Clock
10IO19SPI_QBIDIRECTIONALGPIO, SPI Q
11IO21UART_TXOUTPUTGPIO, UART TX
12IO22UART_RXINPUTGPIO, UART RX
Function Pin Function
ESP Pin Pin on ESP32
I/O Input/Output Pin
Description Pin Description

Default Tools

Bootloader toolesptool_py
Uploader toolesptool_py
Network uploader toolesp_ota
Bootloader address0x1000
Flash modedio
Boot modeqio
Maximum upload size
1280 Kb
(1310720 B)
Maximum data size
320 Kb
(327680 B)

The CYD ESP32-2424S012 development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x1000". Flash mode and boot mode for CYD ESP32-2424S012 development board by default is dio and qio respectively.