CYD ESP32-8048S070 Development Board
Code name: CYD_ESP32_8048S070
CYD ESP32-8048S070 development board is based on esp32s3 microcontroller and uses xtensa architecture. This board has a maximum CPU frequency of 240 MHz and a flash size of 32Mbit.
About CYD ESP32-8048S070
🚀 The CYD ESP32-8048S070 is a budget-friendly ESP32-S3-based development board, commonly referred to as a Cheap Yellow Display (CYD). It features integrated WiFi, Bluetooth 4.2, and a 7.0-inch 800x480 LCD, making it an excellent choice for affordable IoT and embedded display projects. ⚡
📡 With support for 802.11 B/G/N WiFi and Bluetooth 4.2 (BLE), this board is well-suited for wireless applications.
💾 Equipped with 32Mbit SPI Flash, multiple ADC, DAC, I2C, SPI, UART, PWM, and I2S interfaces, it offers a versatile platform for various embedded projects.
Where to Buy
Starting from
$40 per unit
Prices are subject to change. We earn from qualifying purchases as an Amazon Associate.
Technical Specifications
🖥️ Display
🛰️ Connectivity
🧠 Microcontroller
✨ Features
- 21 digital IO pins
- 22 external interrupt pins
- 6 analog input pins
- 14 PWM pins
CYD ESP32-8048S070 Dimensions
CYD ESP32-8048S070 Pinout
✅ Safe Pins to Use
For general GPIO usage, these are the safest and most flexible choices:
Why Are These Pins Safe?
- Not involved in bootstrapping → No impact on device boot mode or system startup
- Not linked to flash memory or PSRAM → Won't interfere with storage or memory access
- Not dedicated to USB or JTAG → Free for general use without affecting debugging
- No special hardware connections → Freely assignable without internal conflicts
⚠️ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage.
Critical Pin Categories:
- 🛠️ Strapping Pins: Control boot behavior and flash voltage selection
- 🔗 JTAG Debugging Pins: Required for low-level debugging
- 🔌 USB Communication Pins: Used for USB Serial/JTAG communication
- ⚡ Flash Memory & SPI Pins: Connected to SPI flash memory and PSRAM
- 📡 UART Serial Communication Pins: Used for debugging and firmware uploads
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | 🛠️ Strapping |
| IO19 | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | 🔌 USB |
CYD ESP32-8048S070 Pin Mappings
This development board provides 21 digital IO pins, out of which 22 can be used as external interrupt pins , 6 as analog input pins and 14 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 2 | GND | GND | POWER GROUND | Ground connection |
| 3 | 5V | 5V | POWER INPUT | 5V power input |
| 4 | IO1 | GPIO1 | BIDIRECTIONAL | GPIO, ADC, I2C |
| 5 | IO2 | GPIO2 | BIDIRECTIONAL | GPIO, ADC |
| 6 | IO3 | GPIO3 | BIDIRECTIONAL | GPIO, ADC |
| 7 | IO16 | SPI_CS | BIDIRECTIONAL | GPIO, SPI Chip Select |
| 8 | IO17 | SPI_D | BIDIRECTIONAL | GPIO, SPI Data |
| 9 | IO18 | SPI_CLK | BIDIRECTIONAL | GPIO, SPI Clock |
| 10 | IO19 | SPI_Q | BIDIRECTIONAL | GPIO, SPI Q |
| 11 | IO21 | UART_TX | OUTPUT | GPIO, UART TX |
| 12 | IO22 | UART_RX | INPUT | GPIO, UART RX |
Default Tools
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x1000 |
| Flash mode | dio |
| Boot mode | qio |
| Maximum upload size | 1280 Kb (1310720 B) |
| Maximum data size | 320 Kb (327680 B) |
The CYD ESP32-8048S070 development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x1000". Flash mode and boot mode for CYD ESP32-8048S070 development board by default is dio and qio respectively.
