Heltec WiFi LoRa 32(V2)
by Heltec
Improved LoRa ESP32 board with better power management - suited for off-grid and battery-powered systems.

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Heltec WiFi LoRa 32(V2) Pinout
24 pins · 2.54 mm pitch| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 0 | KEY_BUILTINA11T1 | strapping | adc · touch | |
| 2 | 1 | TXPWM | uart | uart | |
| 3 | 2 | A12T2PWM | strapping | adc · touch | |
| 4 | 3 | RXPWM | uart | uart | |
| 5 | 4 | A10T0SDA_OLEDPWM | strapping | adc · touch | |
| 6 | 5 | SCKPWM | strapping | spi | |
| 7 | 12 | A15T5PWM | strapping | adc · touch | |
| 8 | 13 | A14T4PWM | strapping | adc · touch | |
| 9 | 14 | A16T6RST_LoRaPWM | strapping | adc · touch | |
| 10 | 15 | A13T3SCL_OLEDPWM | strapping | adc · touch | |
| 11 | 16 | RST_OLEDPWM | strapping | - | |
| 12 | 18 | SSPWM | safe | spi | |
| 13 | 19 | MISOPWM | safe | spi | |
| 14 | 21 | SDAVextPWM | safe | i2c | |
| 15 | 22 | SCLPWM | safe | i2c | |
| 16 | 25 | LED_BUILTINA18DAC1LEDPWM | safe | adc · dac | |
| 17 | 26 | A19DAC2DIO0PWM | safe | adc · dac | |
| 18 | 27 | MOSIA17T7PWM | safe | adc · touch · spi | |
| 19 | 32 | A4T9PWM | safe | adc · touch | |
| 20 | 33 | A5T8PWM | safe | adc · touch | |
| 21 | 34 | A6DIO2 | strapping | adc | |
| 22 | 35 | A7DIO1 | strapping | adc | |
| 23 | 36 | A0 | strapping | adc | |
| 24 | 39 | A3 | strapping | adc |
Start with these
9 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
15 pins · 14 things to knowKEY_BUILTINGPIO0 Bootstrapping pin (enter bootloader when low); internal pull-up. Strapping
Must be HIGH during boot for normal startup; if held LOW on reset, forces flash programming mode.
TXGPIO1 Default UART0 TX pin for USB-serial programming and console. UART
Connected to on-board USB-UART for uploading and logs; drives serial output at boot, so using as GPIO can disrupt programming or console.
A12GPIO2 Bootstrapping pin (must be low or floating at reset); internal pull-down. Strapping
If driven HIGH on reset (while IO0 is LOW), selects an unsupported SDIO boot mode, causing boot failure.
RXGPIO3 Default UART0 RX pin for USB-serial programming (console input). UART
Used for receiving data from USB-UART (programming); also pulled HIGH at boot for console communication, so using as GPIO can disrupt uploads.
A10GPIO4 Bootstrapping pin; internal pull-down; also HSPIHD (flash data line) on modules with internal flash. Strapping
Sampled at reset for boot config; should not be driven at boot (affects boot mode timing).
SCKGPIO5 Bootstrapping pin; internal pull-up; VSPI CS0 (default SPI chip-select); acts as FSPIWP (flash write-protect) on internal-flash variants. Strapping
Must be HIGH during boot; if pulled LOW at reset, alters SDIO slave timing and may prevent normal boot.
A15GPIO12 Bootstrapping pin; JTAG TDI; sets flash voltage (VDD_SDIO); also HSPIQ (flash data line). Strapping
Keep LOW during boot (internal PD); pulling HIGH at reset selects 1.8V flash mode, causing flash brownout if 3.3V flash is used.
A14GPIO13 JTAG clock pin (TCK); also ADC2 channel 4 / Touch4 input. JTAG
Used for JTAG debugging (TCK); avoid using as GPIO if JTAG is needed.
A16GPIO14 JTAG mode select pin (TMS); also HSPI CLK and PWM-capable GPIO. JTAG
Used for JTAG debugging (TMS); driving it as GPIO may interfere with JTAG or produce spurious signals at boot.
A13GPIO15 Bootstrapping pin; JTAG TDO; controls UART0 boot log output; also HSPICS0 (secondary SPI CS). Strapping
Keep HIGH during boot (internal PU); if LOW on reset, bootloader log is silenced and boot mode may change.
RST_OLEDGPIO16 PSRAM CS# on WROVER-class modules and on ESP32-D0WDRH2-V3; in-package flash CS# on ESP32-U4WDH. Also UART2 RX. PSRAM
Wired to the memory die on PSRAM-equipped modules (WROVER, PICO-V3-02) and on in-package-memory chip variants (U4WDH, D0WDRH2-V3); an ordinary GPIO on a plain WROOM-32.
A6GPIO34 Input-only GPIO (no output driver); ADC1 channel 6. Other
Cannot be used as output (no drive capability); only suitable for analog/digital input.
A7GPIO35A3GPIO39 Input-only GPIOs with ADC1 channels - no output driver Other
Cannot be used as output; only suitable for input.
- A7Input-only GPIO (no output driver); ADC1 channel 7.
- A3Input-only GPIO (no output); ADC1 channel 3, Hall sensor VN.
A0GPIO36 Input-only GPIO (no output); ADC1 channel 0, Hall sensor VP. Other
Cannot be used as output; only suitable for input (e.g., analog read).
All 24 pins on the Heltec WiFi LoRa 32(V2) are usable GPIO, spaced at the standard 2.54 mm pitch.
Peripheral wiring is straightforward: I²C is mapped to SDA on GPIO21 and SCL on GPIO22; the SPI bus (MOSI, MISO, SCK, SS) is broken out in full; TX/RX on GPIO1 and GPIO3 cover serial logging and flashing.
Beyond plain digital I/O you get 16 ADC-capable pins for sensors and battery monitoring, 10 capacitive-touch inputs and 2 true DAC outputs.
15 of the exposed pins carry boot-time or system duties on the ESP32 (KEY_BUILTIN, TX, A12 and 12 more) - check the guidance above before wiring anything to them. SS, MISO, SDA, SCL and 5 more are free of any such role - the safest first picks.
Getting started
flash your first firmware in ~2 minutesBoard: ESP32 Dev Module Flash Size: 8MB (64Mb) Flash Mode: DIO Partition Scheme: 8M with spiffs (3MB APP/1.5MB SPIFFS) Upload Speed: 921600
// toggle GPIO18 - wire an LED and resistor to it
void setup() {
pinMode(18, OUTPUT);
}
void loop() {
digitalWrite(18, HIGH); delay(500);
digitalWrite(18, LOW); delay(500);
}[env:heltec_wifi_lora_32_V2]
platform = espressif32
board = esp32dev
framework = arduino
monitor_speed = 115200
upload_speed = 921600esp32dev - or type it after board =.esp32:
board: esp32dev
variant: esp32
framework:
type: esp-idf
# blink - GPIO18
output:
- platform: gpio
pin: 18
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32dev (same ids as PlatformIO).esptool.py --chip esp32 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x1000 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Specifications
ESP32 · 50.2 × 25.5 mm · vs other ESP32 chips →Dimensions
About this board
Inside sits the ESP32 - a dual-core Xtensa with both Bluetooth Classic and BLE.
The $17.90 price tag is typical for an ESP32 board.
Around the module: an OLED 0.96" 128x64 display, LoRa (SX1276), battery charging via JST-SH 1.25mm and Reset/PRG buttons.
- 2.4GHz metal spring antenna for Wi-Fi/BT; IPEX (u.FL) connector with external antenna for LoRa
- Onboard Li-Po charge/discharge management with automatic USB/battery power switching
- LoRa variants ship as SX1276 (868/915MHz) or SX1278 (433MHz)
Where to buy
prices are typical street prices
Resources
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