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Crabik Slot ESP32-S3
A modular ESP32-S3 development board designed for slot-based expansion and customization.
50.8 × 50.8 mm
ESP32-S3
MCU
240MHz
clock
8MB
flash
512KB
SRAM
31· Two 12-bit, 20 Channels ADC
GPIO
BLE 5.0+ WiFi
radio
Pinout
42 pins · 2.54 mm pitch
| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 0 | BOOT_BTN | strapping | - | |
| 2 | 1 | S1T1PWM | safe | touch | |
| 3 | 2 | S3T2PWM | safe | touch | |
| 4 | 3 | S7T3PWM | strapping | touch | |
| 5 | 4 | S8T4PWM | safe | touch | |
| 6 | 5 | S9T5PWM | safe | touch | |
| 7 | 6 | S10T6PWM | safe | touch | |
| 8 | 7 | S11T7PWM | safe | touch | |
| 9 | 8 | S12T8PWM | safe | touch | |
| 10 | 9 | S13T9PWM | strapping | touch | |
| 11 | 10 | S14T10PWM | strapping | touch | |
| 12 | 11 | S4T11PWM | strapping | touch | |
| 13 | 12 | S2T12PWM | strapping | touch | |
| 14 | 13 | SDAPWM | strapping | i2c | |
| 15 | 14 | SCLPWM | strapping | i2c | |
| 16 | 15 | EN_TROYKAPWM | safe | - | |
| 17 | 16 | LIPO_ALERTPWM | safe | - | |
| 18 | 17 | S5PWM | safe | - | |
| 19 | 18 | S6PWM | safe | - | |
| 20 | 19 | USB_DNPWM | uart | - | |
| 21 | 20 | USB_DPPWM | uart | - | |
| 22 | 21 | LED_BUILTINPWM | safe | - | |
| 23 | 33 | S19PWM | strapping | - | |
| 24 | 34 | S20PWM | strapping | - | |
| 25 | 35 | MOSIPWM | strapping | spi | |
| 26 | 36 | SCKPWM | strapping | spi | |
| 27 | 37 | MISOPWM | strapping | spi | |
| 28 | 45 | S15PWM | strapping | - | |
| 29 | 46 | S16 | strapping | - | |
| 30 | 47 | S18 | strapping | - | |
| 31 | 48 | S17 | strapping | - | |
| 32 | - | TX | uart | uart | |
| 33 | - | RX | uart | uart | |
| 34 | - | D | safe | - | |
| 35 | - | C | safe | - | |
| 36 | - | DO | safe | - | |
| 37 | - | DI | safe | - | |
| 38 | - | CLK | safe | - | |
| 39 | - | CS1 | safe | - | |
| 40 | - | CS2 | safe | - | |
| 41 | - | SS | safe | spi | |
| 42 | - | USER_LED | safe | - |
Start with these
12 pins with no boot or system involvementS1T1S3T2S8T4S9T5S10T6S11T7S12T8EN_TROYKAPWMLIPO_ALERTPWMS5PWMS6PWMLED_BUILTINPWM
Freely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| BOOT_BTN | GPIO0 | Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration. | Strapping |
| S7 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
| S15 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
| S16 | GPIO46 | Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function. | Strapping |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| S13 | FSPIHD | Connected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication. | Flash |
| S14 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | Flash |
| S4 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | Flash |
| S2 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | Flash |
| SDA | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | Flash |
| SCL | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations. | Flash |
| USB_DN | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| USB_DP | USB_D+ | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| S19 | FSPIHD | On chips/modules with integrated flash, this IO is wired to the flash hold pin internally. It cannot be reassigned to GPIO without breaking flash access. | Flash |
| S20 | FSPICS0 | Wired to the chip select of the internal flash in flash-equipped variants. It must remain low during flash operation, so it’s not available for other use. | Flash |
| MOSI | FSPID / PSRAM_D0 | In modules with octal PSRAM, this pin is connected to the PSRAM data line. It is reserved for memory interface and not free for general GPIO when flash/PSRAM is present. | Flash |
| SCK | FSPICLK / PSRAM_CLK | In modules with octal PSRAM, this pin drives the PSRAM clock. It must be dedicated to the memory interface, not used as a regular GPIO when that interface is in use. | Flash |
| MISO | FSPIQ / PSRAM_DQS | In modules with octal PSRAM, this pin is connected to the PSRAM’s DQS signal. It cannot be repurposed without disrupting the PSRAM/flash communication. | Flash |
| S18 | SPICLK_P | Used only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use. | Flash |
| S17 | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | Flash |
These are recommendations, not hard rules - with the right pull-ups, timing and boot-state awareness most pins can be made to work. When in doubt, start green.
Pinout notes The Crabik Slot ESP32-S3 breaks out 42 pins in total: 31 GPIO for your project. For peripherals, I²C is mapped to SDA on GPIO13 and SCL on GPIO14, while the…
The Crabik Slot ESP32-S3 breaks out 42 pins in total: 31 GPIO for your project.
For peripherals, I²C is mapped to SDA on GPIO13 and SCL on GPIO14, while the SPI bus (MOSI, MISO, SCK, SS) is broken out in full.
On the analog side there are 12 capacitive-touch inputs.
If you want zero surprises, S1, S3, S8, S9 and 8 more are free of any such role - the safest first picks. 4 of the exposed pins carry boot-time or system duties on the ESP32-S3 (BOOT_BTN, S7, S15 and 1 more).
Getting started
flash your first firmware in ~2 minutes1
Connect over USB
Native USB - no driver, no serial chip. Not detected? Hold BOOT while plugging in.
2
Flash with your tool
Arduino IDE, PlatformIO, ESPHome or esptool - copy the settings on the right.
3
Verify it runs
The blink example uses GPIO1 - swap for your board's LED pin if different.
Board: Crabik Slot Esp32 S3
USB CDC On Boot: Enabled
Flash Size: 8MB · DIO
Upload Speed: 921600
// blink
pinMode(1, OUTPUT);
digitalWrite(1, LOW); // on (often inverted)[env:crabik_slot_esp32_s3]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600esp32:
board: esp32-s3-devkitc-1
variant: crabik_slot_esp32_s3
framework:
type: esp-idf
# blink - GPIO1
output:
- platform: gpio
pin: 1
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesptool.py --chip esp32s3 --port /dev/ttyACM0 \
write_flash 0x0 firmware.binBuild details: sketch space 1310720 B · data 327680 B · DIO
Specifications
ESP32-S3 · 50.8 × 50.8 mmCompute
MCU
ESP32-S3
Clock
240 MHz
SRAM · Flash
512 KB · 8MB
Radio
Wi-Fi
802.11 b/g/n
Bluetooth
5.0 LE
Antenna
PCB
I/O
GPIO · ADC
31 · Two 12-bit, 20 Channels
UART · I²C · SPI
3 · 2 · 4
PWM
8 channels
Power
USB
USB-C
Serial
Native (CDC)
Boot address
0x0
Flashing
Upload · OTA
esptool_py · esp_ota
Flash · Boot mode
DIO · QIO
Sketch · Data
1.25 MB · 320 KB
50.8 × 50.8 mm · pin pitch 2.54 mm
The Crabik Slot ESP32-S3 uses esptool_py for firmware uploads, esp_ota for over-the-air (OTA) updates. Flash mode is DIO with QIO boot mode. The maximum sketch size is 1.25 MB with 320 KB available for data.
About this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
31 GPIO are broken out - more than most ESP32-S3 boards, so the pin budget is rarely the constraint.
Onboard you'll find a Qwiic connector, a battery fuel gauge (MAX17048), battery charging (MCP73831) via JST-PH 2.0, status LEDs (User, Charge, Power) and Reset/Boot buttons.
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
- Four Troyka-format module slots (A–D) for plug-in peripherals
- Dual 3.3V 600mA LDO regulators; second regulator is user-controllable
- Automatic power switching between USB and Li-Po battery
Resources
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