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Edgebox-ESP-100
An industrial-grade ESP32-S3 development board designed for edge computing and IoT gateway applications.
124 × 92 mm
ESP32-S3
MCU
240MHz
clock
16MB
flash
512KB
SRAM
34· Two 12-bit, 20 Channels ADC
GPIO
BLE 5.0+ WiFi
radio
Pinout
34 pins| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 0 | RST | strapping | - | |
| 2 | 1 | CAN_TXDPWM | safe | - | |
| 3 | 2 | CAN_RXDPWM | safe | - | |
| 4 | 4 | DI0PWM | safe | - | |
| 5 | 5 | DI1PWM | safe | - | |
| 6 | 6 | DI2PWM | safe | - | |
| 7 | 7 | DI3PWM | safe | - | |
| 8 | 8 | RS485_RTSPWM | safe | - | |
| 9 | 9 | I2C_INTPWM | strapping | - | |
| 10 | 10 | SSPWM | strapping | spi | |
| 11 | 11 | MISOPWM | strapping | spi | |
| 12 | 12 | MOSIPWM | strapping | spi | |
| 13 | 13 | SCKPWM | strapping | spi | |
| 14 | 14 | ETH_INTPWM | strapping | - | |
| 15 | 15 | ETH_RSTPWM | safe | - | |
| 16 | 16 | LTE_PWR_ENPWM | safe | - | |
| 17 | 17 | RS485_TXDPWM | safe | - | |
| 18 | 18 | RS485_RXDPWM | safe | - | |
| 19 | 19 | SCLPWM | uart | i2c | |
| 20 | 20 | SDAPWM | uart | i2c | |
| 21 | 21 | LTE_PWR_KEYPWM | safe | - | |
| 22 | 35 | DO5 | strapping | - | |
| 23 | 36 | DO4 | strapping | - | |
| 24 | 37 | DO3 | strapping | - | |
| 25 | 38 | DO2 | strapping | - | |
| 26 | 39 | DO1 | strapping | - | |
| 27 | 40 | DO0 | strapping | - | |
| 28 | 41 | AO1 | strapping | - | |
| 29 | 42 | AO0 | strapping | - | |
| 30 | 43 | TXD | strapping | - | |
| 31 | 44 | RXD | strapping | - | |
| 32 | 45 | BUZZER | strapping | - | |
| 33 | 47 | LTE_RXD | strapping | - | |
| 34 | 48 | LTE_TXD | strapping | - |
Start with these
12 pins with no boot or system involvementCAN_TXDPWMCAN_RXDPWMDI0PWMDI1PWMDI2PWMDI3PWMRS485_RTSPWMETH_RSTPWMLTE_PWR_ENPWMRS485_TXDPWMRS485_RXDPWMLTE_PWR_KEYPWM
Freely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| RST | GPIO0 | Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration. | Strapping |
| DO1 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | Other |
| DO0 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | Other |
| AO1 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | Other |
| AO0 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | Other |
| TXD | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| RXD | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| BUZZER | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| I2C_INT | FSPIHD | Connected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication. | Flash |
| SS | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | Flash |
| MISO | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | Flash |
| MOSI | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | Flash |
| SCK | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | Flash |
| ETH_INT | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations. | Flash |
| SCL | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| SDA | USB_D+ | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| DO5 | FSPID / PSRAM_D0 | In modules with octal PSRAM, this pin is connected to the PSRAM data line. It is reserved for memory interface and not free for general GPIO when flash/PSRAM is present. | Flash |
| DO4 | FSPICLK / PSRAM_CLK | In modules with octal PSRAM, this pin drives the PSRAM clock. It must be dedicated to the memory interface, not used as a regular GPIO when that interface is in use. | Flash |
| DO3 | FSPIQ / PSRAM_DQS | In modules with octal PSRAM, this pin is connected to the PSRAM’s DQS signal. It cannot be repurposed without disrupting the PSRAM/flash communication. | Flash |
| DO2 | FSPIWP | On flash-equipped chips, this pin is tied to the flash’s WP# (or D3) line. It should be avoided for other use, as it’s needed for flash operations. | Flash |
| LTE_RXD | SPICLK_P | Used only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use. | Flash |
| LTE_TXD | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | Flash |
These are recommendations, not hard rules - with the right pull-ups, timing and boot-state awareness most pins can be made to work. When in doubt, start green.
Pinout notes All 34 pins on the Edgebox-ESP-100 are usable GPIO. Peripheral wiring is straightforward: I²C is mapped to SDA on GPIO20 and SCL on GPIO19, while the SPI bus (…
All 34 pins on the Edgebox-ESP-100 are usable GPIO.
Peripheral wiring is straightforward: I²C is mapped to SDA on GPIO20 and SCL on GPIO19, while the SPI bus (MOSI, MISO, SCK, SS) is broken out in full.
8 of the exposed pins carry boot-time or system duties on the ESP32-S3 (RST, DO1, DO0 and 5 more) - check the guidance above before wiring anything to them. CAN_TXD, CAN_RXD, DI0, DI1 and 8 more are free of any such role - the safest first picks.
Getting started
flash your first firmware in ~2 minutes1
Connect over USB
Native USB - shows up as a port right away, no driver needed. Not detected? Hold BOOT while plugging in.
2
Match & flash
Set the Tools options shown, then click Upload.
3
Verify it runs
The onboard LED on GPIO1 blinks - swap the pin if your board's LED differs.
Set these in Tools · leave everything else at default
Arduino IDE 2.x — Tools Copy
Board: "ESP32S3 Dev Module"▸
USB CDC On Boot: "Enabled"▸
Flash Size: "16MB (128Mb)"▸
Flash Mode: "DIO"▸
PSRAM: "QSPI PSRAM"▸
Partition Scheme: "16M Flash (3MB APP / 9.9MB FATFS)" (default)▸
Upload Speed: "921600"▸
▸ every other Tools option — leave at default
Board: ESP32S3 Dev Module USB CDC On Boot: Enabled Flash Size: 16MB (128Mb) Flash Mode: DIO PSRAM: QSPI PSRAM Partition Scheme: 16M Flash (3MB APP / 9.9MB FATFS) Upload Speed: 921600
Find it: Tools ▸ Board ▸ ESP32 Arduino ▸ ESP32S3 Dev Module
// blink the onboard LED
void setup() {
pinMode(1, OUTPUT);
}
void loop() {
digitalWrite(1, HIGH); delay(500);
digitalWrite(1, LOW); delay(500);
}board to selectesp32-s3-devkitc-1⧉ copy
[env:Edgebox-ESP-100]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_qspi
build_flags = -DBOARD_HAS_PSRAMFind it: PlatformIO Home ▸ Boards, search
esp32-s3-devkitc-1 — or type it after board =.board to selectesp32-s3-devkitc-1⧉ copy
esp32:
board: esp32-s3-devkitc-1
variant: Edgebox-ESP-100
framework:
type: esp-idf
psram:
mode: quad
speed: 80MHz
# blink - GPIO1
output:
- platform: gpio
pin: 1
id: led_out
light:
- platform: binary
name: "LED"
output: led_outFind it: search ESPHome's board list for
esp32-s3-devkitc-1 (same ids as PlatformIO).esptool doesn't pick board settings — a prebuilt .bin already has them baked in. This is just the raw flash command.
esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Build details: sketch space 1310720 B · data 327680 B · DIO
Specifications
ESP32-S3 · 124 × 92 mmCompute
MCU
ESP32-S3
Clock
240 MHz
SRAM · Flash
512 KB · 16MB · 8MB (QSPI) PSRAM
Radio
Wi-Fi
802.11 b/g/n
Bluetooth
5.0 LE
Antenna
External
I/O
GPIO · ADC
34 · Two 12-bit, 20 Channels
UART · I²C · SPI
3 · 2 · 4
PWM
8 channels
Power
USB
USB-C (native) · USB-A
Serial
Native (CDC)
Boot address
0x0
Flashing
Upload · OTA
esptool_py · esp_ota
Flash · Boot mode
DIO · QIO
Sketch · Data
1.25 MB · 320 KB
124 × 92 mm
The Edgebox-ESP-100 uses esptool_py for firmware uploads, esp_ota for over-the-air (OTA) updates. Flash mode is DIO with QIO boot mode. The maximum sketch size is 1.25 MB with 320 KB available for data.
About this board
Inside sits the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
At $139.00 it's on the expensive side for an ESP32-S3 board - most land around $30.
With 34 GPIO broken out, you get more pins to play with than most ESP32-S3 boards offer.
Around the module: 8MB (QSPI) PSRAM, a PCF8563 RTC, a buzzer, an RS485 interface, a CAN bus interface, cellular connectivity (SIMCom A7670G) and wired Ethernet (W5500).
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
- 4 isolated digital inputs (24V) and 6 isolated digital outputs
- 4 isolated analog inputs (0-20mA / 0-10V) and 2 isolated analog outputs (0-5V)
- Isolated RS485 and CAN Bus with onboard 120Ω termination
- SIMCom A7670G 4G LTE Cat-1 cellular modem
- ATECC608A crypto element and FM24CL64B FRAM (non-volatile retain memory)
- SGM58031 16-bit ADC for the isolated analog inputs
- Industrial enclosure, operating temperature -20 to 60°C
Where to buy
prices are typical street pricesEdgebox-ESP-100
$139.00per unit, typical
Resources
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