Espressif ESP Thread Border Router/Zigbee Gateway
by Espressif
Reference gateway for Thread and Zigbee networks - enables secure Matter integration in smart home ecosystems.

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Pinout
24 pins| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 0 | A11T1PWM | strapping | adc · touch | |
| 2 | 1 | TXPWM | uart | uart | |
| 3 | 2 | A12T2PWM | safe | adc · touch | |
| 4 | 3 | RXPWM | strapping | uart | |
| 5 | 4 | A10T0PWM | safe | adc · touch | |
| 6 | 5 | PWM | safe | - | |
| 7 | 12 | A15T5PWM | strapping | adc · touch | |
| 8 | 13 | A14T4PWM | strapping | adc · touch | |
| 9 | 14 | A16T6PWM | strapping | adc · touch | |
| 10 | 15 | A13T3PWM | safe | adc · touch | |
| 11 | 16 | PWM | safe | - | |
| 12 | 17 | PWM | safe | - | |
| 13 | 18 | PWM | safe | - | |
| 14 | 19 | PWM | uart | - | |
| 15 | 21 | PWM | safe | - | |
| 16 | 22 | PWM | safe | - | |
| 17 | 23 | PWM | safe | - | |
| 18 | 25 | A18DAC1PWM | safe | adc · dac | |
| 19 | 26 | A19DAC2PWM | strapping | adc · dac | |
| 20 | 27 | A17T7PWM | strapping | adc · touch | |
| 21 | 32 | A4T9PWM | strapping | adc · touch | |
| 22 | 33 | A5T8PWM | strapping | adc · touch | |
| 23 | 34 | A6 | strapping | adc | |
| 24 | 35 | A7 | strapping | adc |
Start with these
12 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| A11 | GPIO0 | Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration. | Strapping |
| RX | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
| A15 | FSPICLK | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| A14 | FSPIQ | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| A16 | FSPIWP | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| PWM | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| A19 | SPICS1 | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| A17 | SPIHD | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| A4 | SPID | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| A5 | SPIIO4 (GPIO33) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode", so octal-PSRAM modules (N16R8 and friends) consume it and do not break it out. On quad-PSRAM or PSRAM-less parts it is an ordinary GPIO - check which variant your module carries. | Flash |
| A6 | SPIIO5 (GPIO34) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode", so octal-PSRAM modules (N16R8 and friends) consume it and do not break it out. On quad-PSRAM or PSRAM-less parts it is an ordinary GPIO - check which variant your module carries. | Flash |
| A7 | SPIIO6 (GPIO35) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode", so octal-PSRAM modules (N16R8 and friends) consume it and do not break it out. On quad-PSRAM or PSRAM-less parts it is an ordinary GPIO - check which variant your module carries. | Flash |
Pinout notes The Espressif ESP Thread Border Router/Zigbee Gateway pinout brings out 24 GPIO pins - every one of them usable in your project. For peripherals, TX/RX on…
The Espressif ESP Thread Border Router/Zigbee Gateway pinout brings out 24 GPIO pins - every one of them usable in your project.
For peripherals, TX/RX on GPIO1 and GPIO3 cover serial logging and flashing.
On the analog side there are 14 ADC-capable pins for sensors and battery monitoring, 10 capacitive-touch inputs and 2 true DAC outputs.
If you want zero surprises, TX, A12, A10, PWM and 8 more are free of any such role - the safest first picks. 5 of the exposed pins carry boot-time or system duties on the ESP32-S3 (A11, RX, A15 and 2 more).
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module Flash Size: 4MB (32Mb) Flash Mode: DIO PSRAM: QSPI PSRAM Partition Scheme: Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) Upload Speed: 921600
// toggle GPIO2 - wire an LED and resistor to it
void setup() {
pinMode(2, OUTPUT);
}
void loop() {
digitalWrite(2, HIGH); delay(500);
digitalWrite(2, LOW); delay(500);
}[env:esp-thread-br-zigbee-gw]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_qspi
build_flags = -DBOARD_HAS_PSRAMesp32-s3-devkitc-1 - or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: esp32s3
framework:
type: esp-idf
psram:
mode: quad
speed: 80MHz
# blink - GPIO2
output:
- platform: gpio
pin: 2
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Specifications
ESP32-S3 · vs other ESP32 chips →About this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $10.00 - less than the ~$29 most ESP32-S3 boards go for.
Onboard you'll find 2MB (QSPI) PSRAM, Zigbee and wired Ethernet (true).
The ESP Thread Border Router/Zigbee Gateway is a development board designed to facilitate seamless wireless connectivity in IoT applications. It supports 802.11 b/g/n Wi-Fi, 802.15.4 Thread, Zigbee®, and Bluetooth® 5.x (BLE) at 2.4GHz, making it highly versatile for a range of IoT use cases. Powered by the ESP32-S3-WROOM-1 and ESP32-H2-MINI-1 modules, the board includes 4MB Flash and 2MB PSRAM, providing ample memory for smooth operation. Additionally, it features Sub-Ethernet capabilities, further enhancing its role as a robust Thread Border Router and Zigbee Gateway for seamless network integration and management.
- Dual-radio design - ESP32-S3-WROOM-1 host + ESP32-H2-MINI-1 802.15.4 (Thread/Zigbee) radio co-processor
- RJ45 Ethernet uplink for the Thread border router
Where to buy
prices are typical street prices
Resources
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