Espressif ESP32-S3-DevKitM-1
by Espressif
Compact ESP32-S3 board with rich peripheral support - ideal for secure, low-power wireless development.

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Pinout
44 pins · 2.54 mm pitch| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | - | 3V33.3V | power | - | 3.3V regulated output |
| 2 | 0 | IO0 | strapping | pwm | BOOT button |
| 3 | 1 | IO1A1T1 | safe | adc · touch · pwm | ADC1_CH0; RTC |
| 4 | 2 | IO2A2T2 | safe | adc · touch · pwm | ADC1_CH1; RTC |
| 5 | 3 | IO3A3T3 | strapping | adc · touch · pwm | ADC1_CH2; RTC |
| 6 | 4 | IO4A4T4 | safe | adc · touch · pwm | ADC1_CH3; RTC |
| 7 | 5 | IO5A5T5 | safe | adc · touch · pwm | ADC1_CH4; RTC |
| 8 | 6 | IO6A6T6 | safe | adc · touch · pwm | ADC1_CH5; RTC |
| 9 | 7 | IO7A7T7 | safe | adc · touch · pwm | ADC1_CH6; RTC |
| 10 | 8 | IO8A8T8 | safe | adc · touch · pwm | ADC1_CH7; RTC |
| 11 | 9 | IO9A9T9 | strapping | adc · touch · spi · pwm | ADC1_CH8; RTC; FSPIHD |
| 12 | 10 | IO10A10T10SS | strapping | adc · touch · spi · pwm | ADC1_CH9; RTC; FSPICS0 |
| 13 | 11 | IO11A11T11MOSI | strapping | adc · touch · spi · pwm | ADC2_CH0; RTC; FSPID |
| 14 | 12 | IO12A12T12SCK | strapping | adc · touch · spi · pwm | ADC2_CH1; RTC; FSPICLK |
| 15 | 13 | IO13A13T13MISO | strapping | adc · touch · spi · pwm | ADC2_CH2; RTC; FSPIQ |
| 16 | 14 | IO14A14T14 | strapping | adc · touch · spi · pwm | ADC2_CH3; RTC; FSPIWP |
| 17 | 15 | IO15A15 | uart | adc · uart · pwm | ADC2_CH4; RTC; U0RTS; XTAL_32K_P |
| 18 | 16 | IO16A16 | uart | adc · uart · pwm | ADC2_CH5; RTC; U0CTS; XTAL_32K_N |
| 19 | 17 | IO17A17 | uart | adc · uart · pwm | ADC2_CH6; RTC; U1TXD |
| 20 | 18 | IO18A18 | uart | adc · uart · pwm | ADC2_CH7; RTC; U1RXD |
| 21 | - | 5V | power | - | 5V input (from USB) / output |
| 22 | - | GND | ground | - | Ground |
| 23 | - | GND | ground | - | Ground |
| 24 | - | RSTEN | control | - | Chip reset (active low) |
| 25 | 46 | IO46 | strapping | pwm | LOG output |
| 26 | 45 | IO45 | strapping | spi · pwm | VSPI |
| 27 | 44 | IO44RX | strapping | uart · pwm | UART0 RX |
| 28 | 43 | IO43TX | strapping | uart · pwm | UART0 TX |
| 29 | 42 | IO42MTMS | strapping | pwm | JTAG MTMS |
| 30 | 41 | IO41MTDI | strapping | pwm | JTAG MTDI |
| 31 | 40 | IO40MTDO | strapping | pwm | JTAG MTDO |
| 32 | 39 | IO39MTCK | strapping | pwm | JTAG MTCK |
| 33 | 38 | IO38 | strapping | spi · pwm | FSPIWP |
| 34 | 37 | IO37 | strapping | spi · pwm | SPIDQS; FSPIQ |
| 35 | 36 | IO36 | strapping | spi · pwm | SPIIO7; FSPICLK |
| 36 | 35 | IO35 | strapping | spi · pwm | SPIIO6; FSPID |
| 37 | 34 | IO34 | strapping | spi · pwm | SPIIO5; FSPICS0 |
| 38 | 33 | IO33 | strapping | spi · pwm | SPIIO4; FSPIHD |
| 39 | 26 | IO26 | safe | spi · pwm | SPICS1 |
| 40 | 21 | IO21 | safe | pwm | RTC GPIO |
| 41 | 20 | IO20A20 | uart | adc · uart · pwm | USB D+ (native USB Serial/JTAG); ADC2_CH9; RTC; U1CTS |
| 42 | 19 | IO19A19 | uart | adc · uart · pwm | USB D- (native USB Serial/JTAG); ADC2_CH8; RTC; U1RTS |
| 43 | 48 | IO48 | strapping | spi · pwm | Onboard RGB LED; SPICLK_N |
| 44 | 47 | IO47 | strapping | spi · pwm | SPICLK_P |
Start with these
13 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| IO0 | GPIO0 | Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration. | Strapping |
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
| IO46 | GPIO46 | Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function. | Strapping |
| IO45 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
| IO44 | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| IO43 | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| IO42 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | Other |
| IO41 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | Other |
| IO40 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | Other |
| IO39 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | Other |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| IO9 | FSPIHD | Connected to external flash (data/hold signal) on most modules. Not recommended for use as GPIO, since it must remain dedicated to flash communication. | Flash |
| IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | Flash |
| IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | Flash |
| IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | Flash |
| IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | Flash |
| IO14 | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations. | Flash |
| IO38 | FSPIWP | On flash-equipped chips, this pin is tied to the flash’s WP# (or D3) line. It should be avoided for other use, as it’s needed for flash operations. | Flash |
| IO37 | FSPIQ / PSRAM_DQS | In modules with octal PSRAM, this pin is connected to the PSRAM’s DQS signal. It cannot be repurposed without disrupting the PSRAM/flash communication. | Flash |
| IO36 | FSPICLK / PSRAM_CLK | In modules with octal PSRAM, this pin drives the PSRAM clock. It must be dedicated to the memory interface, not used as a regular GPIO when that interface is in use. | Flash |
| IO35 | FSPID / PSRAM_D0 | In modules with octal PSRAM, this pin is connected to the PSRAM data line. It is reserved for memory interface and not free for general GPIO when flash/PSRAM is present. | Flash |
| IO34 | FSPICS0 | Wired to the chip select of the internal flash in flash-equipped variants. It must remain low during flash operation, so it’s not available for other use. | Flash |
| IO33 | FSPIHD | On chips/modules with integrated flash, this IO is wired to the flash hold pin internally. It cannot be reassigned to GPIO without breaking flash access. | Flash |
| IO20 | USB_D+ | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| IO19 | USB_D- | By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality. | USB |
| IO48 | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | Flash |
| IO47 | SPICLK_P | Used only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use. | Flash |
Pinout notes The Espressif ESP32-S3-DevKitM-1 pinout brings out 44 pins at a 2.54 mm pitch - 39 usable GPIO alongside the 3V3 , 5V and GND power rails. Peripheral wiring is…
The Espressif ESP32-S3-DevKitM-1 pinout brings out 44 pins at a 2.54 mm pitch - 39 usable GPIO alongside the 3V3, 5V and GND power rails.
Peripheral wiring is straightforward: the SPI bus (MOSI, MISO, SCK, SS) is broken out in full, while TX/RX on GPIO43 and GPIO44 cover serial logging and flashing.
Beyond plain digital I/O you get 20 ADC-capable pins for sensors and battery monitoring, PWM on every GPIO and 14 capacitive-touch inputs.
10 of the exposed pins carry boot-time or system duties on the ESP32-S3 (IO0, IO3, IO46 and 7 more) - check the guidance above before wiring anything to them. IO1, IO2, IO4, IO5 and 9 more are free of any such role - the safest first picks.
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module USB CDC On Boot: Enabled Flash Size: 8MB (64Mb) Flash Mode: DIO Partition Scheme: 8M with spiffs (3MB APP / 1.5MB SPIFFS) Upload Speed: 921600
// blink the onboard LED
void setup() {
pinMode(1, OUTPUT);
}
void loop() {
digitalWrite(1, HIGH); delay(500);
digitalWrite(1, LOW); delay(500);
}[env:esp32-s3-devkitm-1]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600esp32-s3-devkitc-1 — or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: esp32_s3_devkitm_1
framework:
type: esp-idf
# blink - GPIO1
output:
- platform: gpio
pin: 1
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Specifications
ESP32-S3 · 62.74 × 25.4 mmAbout this board
Inside sits the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
At $15.00 it's cheaper than most ESP32-S3 boards, which usually run around $30.
With 39 GPIO broken out, you get more pins to play with than most ESP32-S3 boards offer.
Around the module: an addressable RGB LED (GPIO48) and Boot/Reset buttons.
Where to buy
prices are typical street prices
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