LilyGo T-Beam Supreme
A development board combining ESP32-S3 with LoRa and GPS capabilities, ideal for tracking and remote sensing applications.
Pinout
24 pins · 2.54 mm pitch
| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | - | VBAT | power | - | 18650 battery input (left edge header) |
| 2 | - | VBUS5V | power | - | 5V input from USB-C (left edge header) |
| 3 | - | GND | ground | - | Ground (left edge header) |
| 4 | - | VSYS | power | - | 5V output, 500mA (left edge header) |
| 5 | - | GND | ground | - | Ground (left edge header) |
| 6 | - | B-LDO2 | power | - | AXP2101 PMU rail B-LDO2, 0.5-3.3V programmable, 300mA (left edge header) |
| 7 | - | DC4 | power | - | AXP2101 PMU rail DC4, 0.6-1.84V, up to 2A (left edge header) |
| 8 | - | GND | ground | - | Ground (left edge header) |
| 9 | - | DC5 | power | - | AXP2101 PMU power rail DC5, also feeds the M.2 socket (left edge header) |
| 10 | - | DC13V3 | power | - | AXP2101 3.3V rail, 500mA, also powers the ESP32-S3 (left edge header) |
| 11 | - | RST | control | - | Reset / EN (left edge header) |
| 12 | 44 | RXDU1RXD | strapping | uart · i2c | UART1 RX; also on the external QWIIC socket, usable as I2C (left edge header) |
| 13 | 43 | TXDU1TXD | strapping | uart · i2c | UART1 TX; also on the external QWIIC socket, usable as I2C (left edge header) |
| 14 | 17 | SDA | safe | i2c | Shared I2C SDA (bus 0 with OLED, QMC6310 magnetometer, BME280) (right edge header) |
| 15 | 18 | SCL | safe | i2c | Shared I2C SCL (bus 0 with OLED, QMC6310 magnetometer, BME280) (right edge header) |
| 16 | - | A-LDO2 | power | - | AXP2101 PMU rail A-LDO2, 0.5-3.3V programmable, 300mA (right edge header) |
| 17 | 46 | IO46 | strapping | pwm | GPIO46 (strapping pin) (right edge header) |
| 18 | 45 | IO45 | strapping | pwm | GPIO45 (strapping pin) (right edge header) |
| 19 | 39 | IO39 | strapping | pwm | GPIO39 (right edge header) |
| 20 | 38 | IO38 | strapping | pwm | GPIO38 (right edge header) |
| 21 | 2 | IO2 | safe | adc · touch · pwm | GPIO2, ADC1_CH1, touch capable (strapping pin) (right edge header) |
| 22 | 3 | IO3 | strapping | adc · touch · pwm | GPIO3, ADC1_CH2, touch capable (strapping pin) (right edge header) |
| 23 | 21 | IO21 | safe | pwm | GPIO21 (right edge header) |
| 24 | 48 | IO48 | strapping | pwm | GPIO48 (right edge header) |
Start with these
4 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| RXD | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| TXD | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| IO46 | GPIO46 | Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function. | Strapping |
| IO45 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
| IO39 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | Other |
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| IO38 | FSPIWP | On flash-equipped chips, this pin is tied to the flash’s WP# (or D3) line. It should be avoided for other use, as it’s needed for flash operations. | Flash |
| IO48 | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | Flash |
Pinout notes The LilyGo T-Beam Supreme breaks out 24 pins in total: 12 GPIO for your project, with VBAT , VBUS , GND , VSYS , B-LDO2 , DC4 , DC5 , DC1 and A-LDO2 handling…
The LilyGo T-Beam Supreme breaks out 24 pins in total: 12 GPIO for your project, with VBAT, VBUS, GND, VSYS, B-LDO2, DC4, DC5, DC1 and A-LDO2 handling power.
Peripheral wiring is straightforward: I²C is mapped to SDA on GPIO17 and SCL on GPIO18.
Beyond plain digital I/O you get 2 ADC-capable pins for sensors and battery monitoring, PWM on 8 pins and 2 capacitive-touch inputs.
6 of the exposed pins carry boot-time or system duties on the ESP32-S3 (RXD, TXD, IO46 and 3 more) - check the guidance above before wiring anything to them. SDA, SCL, IO2 and IO21 are free of any such role - the safest first picks.
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module USB CDC On Boot: Enabled Flash Size: 8MB (64Mb) Flash Mode: DIO PSRAM: QSPI PSRAM Partition Scheme: 8M with spiffs (3MB APP / 1.5MB SPIFFS) Upload Speed: 921600
// blink the onboard LED
void setup() {
pinMode(17, OUTPUT);
}
void loop() {
digitalWrite(17, HIGH); delay(500);
digitalWrite(17, LOW); delay(500);
}[env:lilygo_t_beam_supreme]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_qspi
build_flags = -DBOARD_HAS_PSRAMesp32-s3-devkitc-1 — or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: lilygo_t_beam_supreme
framework:
type: esp-idf
psram:
mode: quad
speed: 80MHz
# blink - GPIO17
output:
- platform: gpio
pin: 17
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Specifications
ESP32-S3 · 114.6 × 28 mmAbout this board
Inside sits the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
At $49.99 it's on the expensive side for an ESP32-S3 board - most land around $30.
Only 12 GPIO are broken out, where most ESP32-S3 boards manage about 22 - worth checking the pinout covers what you need.
Around the module: 8MB (QSPI) PSRAM, an OLED 1.3" 128x64 display, a microSD slot, a Qwiic connector, LoRa (SX1262), GPS (u-blox MAX-M10S), a QMI8658 IMU, a PCF8563 RTC, an environmental sensor (BME280), battery charging (AXP2101) via 18650 holder and Reset/Boot/Power buttons.
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
The LilyGo T-Beam Supreme is an advanced ESP32-S3-based development board designed for LoRa and GPS applications. It integrates an ESP32-S3 dual-core processor with WiFi and Bluetooth 5, offering seamless connectivity.
Featuring an onboard LoRa transceiver (SX1262), the T-Beam Supreme supports long-range communication at 433/868/915 MHz. It also includes an upgraded Ublox GPS module for enhanced location tracking capabilities.
The board is equipped with 8MB Flash and 8MB PSRAM, along with a 18650 Li-ion battery holder for portable applications, making it ideal for IoT, tracking, and telemetry projects.
- 18650 Li-ion battery holder on the underside
- QMC6310 3-axis magnetometer / e-compass
- GPS variant: u-blox MAX-M10S or Quectel L76K
- LoRa variant: SX1262 (sub-GHz) or LR1121 (multi-band)
- SMA connector for external LoRa antenna
Where to buy
prices are typical street pricesResources
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