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Pinout
21 pins · 2.54 mm pitch| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | - | 3V33.3V | power | - | 3.3V regulated output |
| 2 | - | GND | ground | - | Ground |
| 3 | - | VSYSVBUS | power | - | USB 5V / system power rail |
| 4 | 1 | IO1 | safe | adc · touch · pwm | Left header; ADC1_CH0, capacitive-touch capable |
| 5 | 2 | IO2SCL | safe | adc · touch · i2c · pwm | Left header; I2C SCL - shared with CST816 touch controller |
| 6 | 3 | IO3SDA | strapping | adc · touch · i2c · pwm | Left header; I2C SDA - shared with CST816 touch controller (strapping pin) |
| 7 | 10 | IO10SS | strapping | adc · touch · spi · pwm | Left header; default FSPI CS (SS), ADC1_CH9 |
| 8 | 11 | IO11MOSI | strapping | adc · touch · spi · pwm | Left header; default FSPI MOSI, ADC2_CH0 |
| 9 | 12 | IO12SCK | strapping | adc · touch · spi · pwm | Left header; default FSPI SCK, ADC2_CH1 |
| 10 | 13 | IO13MISO | strapping | adc · touch · spi · pwm | Left header; default FSPI MISO, ADC2_CH2 |
| 11 | 14 | IO14 | strapping | adc · touch · pwm | Left header; ADC2_CH3, capacitive-touch capable |
| 12 | 15 | IO15 | safe | adc · pwm | Left header; ADC2_CH4, U0RTS |
| 13 | 16 | IO16 | safe | adc · pwm | Left header; ADC2_CH5, U0CTS |
| 14 | 39 | IO39 | strapping | pwm | Right header; MTCK (JTAG) |
| 15 | 40 | IO40 | strapping | pwm | Right header; MTDO (JTAG) |
| 16 | 41 | IO41 | strapping | pwm | Right header; MTDI (JTAG) |
| 17 | 42 | IO42 | strapping | pwm | Right header; MTMS (JTAG) |
| 18 | 43 | IO43TX | strapping | uart · i2c · pwm | Right header; UART0 TX (U0TXD), also on Qwiic/STEMMA QT I2C connector |
| 19 | 44 | IO44RX | strapping | uart · i2c · pwm | Right header; UART0 RX (U0RXD), also on Qwiic/STEMMA QT I2C connector |
| 20 | 45 | IO45 | strapping | pwm | Right header; strapping pin |
| 21 | 46 | IO46 | strapping | pwm | Right header; strapping pin |
Start with these
4 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
| IO39 | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | Other |
| IO40 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | Other |
| IO41 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | Other |
| IO42 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | Other |
| IO43 | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| IO44 | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| IO45 | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
| IO46 | GPIO46 | Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function. | Strapping |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | Flash |
| IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | Flash |
| IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | Flash |
| IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | Flash |
| IO14 | FSPIWP | Connected to external flash (data/write-protect signal). Not recommended as GPIO because it’s reserved for flash operations. | Flash |
Pinout notes Across 21 pins (2.54 mm pitch), the LilyGo T-Display-S3 AMOLED Touch exposes 18 GPIO plus 3V3 , GND and VSYS for power. For peripherals, I²C is mapped to SDA…
Across 21 pins (2.54 mm pitch), the LilyGo T-Display-S3 AMOLED Touch exposes 18 GPIO plus 3V3, GND and VSYS for power.
For peripherals, I²C is mapped to SDA on GPIO3 and SCL on GPIO2; the SPI bus (MOSI, MISO, SCK, SS) is broken out in full; TX/RX on GPIO43 and GPIO44 cover serial logging and flashing.
On the analog side there are 10 ADC-capable pins for sensors and battery monitoring, PWM on every GPIO and 8 capacitive-touch inputs.
If you want zero surprises, IO1, IO2, IO15 and IO16 are free of any such role - the safest first picks. 9 of the exposed pins carry boot-time or system duties on the ESP32-S3 (IO3, IO39, IO40 and 6 more).
Getting started
flash your first firmware in ~2 minutesBoard:
USB CDC On Boot: Enabled
Flash Size: 16MB
Upload Speed: 921600
// blink
pinMode(1, OUTPUT);
digitalWrite(1, LOW); // on (often inverted)[env:lilygo_t_display_s3_amoled_touch]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600esp32:
board: esp32-s3-devkitc-1
variant:
framework:
type: esp-idf
# blink - GPIO1
output:
- platform: gpio
pin: 1
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesptool.py --chip esp32s3 --port /dev/ttyACM0 \
write_flash 0x0 firmware.binSpecifications
ESP32-S3 · 60 × 25.5 mmAbout this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $33.98 - in line with other ESP32-S3 boards.
Onboard you'll find 8MB (OPI) PSRAM, an AMOLED 1.91" 240x536 display with touch, battery charging via JST 1.25 and Boot/Reset buttons.
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
The LilyGo T-Display-S3 AMOLED Touch is a cutting-edge development board featuring an ESP32-S3 chip with integrated WiFi and Bluetooth 5 capabilities. It boasts a 1.91-inch AMOLED display with a resolution of 536x240 pixels, driven by an RM67162 controller, offering vibrant visuals for embedded applications. Now featuring capacitive touch support for intuitive user interactions.
Where to buy
prices are typical street prices
Resources
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