LilyGo T5 4.7 Inch E-Paper V2.3
by LilyGo
The ESP32-S3 revision of the LilyGo T5 4.7" E-Paper - adds GT911 touch, a microSD slot and an RTC.

On this page
Pinout
15 pins · 2.54 mm pitch| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | - | 3V33.3VV | power | - | 3.3V rail broken out on the touch FPC connector and the small IO breakout headers |
| 2 | - | 5VVBUS | power | - | 5V from USB-C, exposed as VBUS on the 40-pin Raspberry-Pi-style expansion header |
| 3 | - | GND | ground | - | Ground on the 40-pin header, the small IO headers, the touch FPC and the battery connector |
| 4 | - | VBATBAT | power | - | 3.7V Li-Po input on the JST-PH 2.0mm battery connector; charged over USB-C. Battery voltage is sensed internally on GPIO14 (Bat ADC) |
| 5 | 43 | TXU0TXDIO43 | strapping | uart | 40-pin expansion header UART0 TX (U0TXD / serial console) |
| 6 | 44 | RXU0RXDIO44 | strapping | uart | 40-pin expansion header UART0 RX (U0RXD / serial console) |
| 7 | 17 | SCLIO17 | safe | adc · i2c | 40-pin header and touch FPC I2C SCL, shared by the GT911 touch controller and the PCF8563 RTC. ADC2 |
| 8 | 18 | SDAIO18 | safe | adc · i2c | 40-pin header and touch FPC I2C SDA, shared by the GT911 touch controller and the PCF8563 RTC. ADC2 |
| 9 | 47 | TOUCH_INTIO47 | strapping | - | 40-pin header and touch FPC GT911 capacitive-touch interrupt (INT) |
| 10 | 10 | MOSIIO10 | strapping | adc · touch · spi | 40-pin expansion header general-purpose SPI MOSI (GPIO_MOSI). ADC1/Touch10 |
| 11 | 45 | MISOSTVIO45 | strapping | spi | General-purpose SPI MISO (GPIO_MISO) on the 40-pin header and the small IO header, shared with the e-paper STV line. Strapping pin (VDD_SPI voltage) |
| 12 | 48 | SCLKLEIO48 | strapping | spi | General-purpose SPI clock (GPIO_SCLK, printed SCL on the 40-pin header) on the 40-pin header and the small IO header, shared with the e-paper LE line |
| 13 | 39 | CSIO39 | strapping | spi | 40-pin expansion header general-purpose SPI chip-select (GPIO_CS) |
| 14 | 16 | IO16SD_MISOMISO | safe | adc · spi | Small 4-pin IO header (G/16/15/V), shared with the microSD MISO. ADC2 |
| 15 | 15 | IO15SD_MOSIMOSI | safe | adc · spi | Small 4-pin IO header (G/16/15/V), shared with the microSD MOSI. ADC2 |
Start with these
4 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| TX | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| RX | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| MISO | GPIO45 | Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting. | Strapping |
| CS | MTCK (GPIO39) | Default JTAG debugging TCK pin. If JTAG is needed, this pin must be free; it may also be used internally for PSRAM chip select on certain modules, so avoid repurposing it. | Other |
Only if you know the tricks
wired to flash or USB - expect a fight| Pin | Label | What to know | Role |
|---|---|---|---|
| TOUCH_INT | SPICLK_P | Used only on variants with Octal SPI interface (e.g. ESP32-S3R16V) as part of the differential clock pair. On such chips it operates at 1.8 V and is reserved for the high-speed octal SPI clock, not for general GPIO use. | Flash |
| MOSI | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | Flash |
| SCLK | SPICLK_N | Used only on variants with Octal SPI interface, as the negative leg of the differential clock&. On such chips it operates at 1.8 V; it should be avoided for GPIO to prevent conflicts with the octal flash/PSRAM clock. | Flash |
Pinout notes Across 15 pins (2.54 mm pitch), the LilyGo T5 4.7 Inch E-Paper V2.3 exposes 11 GPIO plus 3V3 , 5V , GND and VBAT for power. For peripherals, I²C is mapped to…
Across 15 pins (2.54 mm pitch), the LilyGo T5 4.7 Inch E-Paper V2.3 exposes 11 GPIO plus 3V3, 5V, GND and VBAT for power.
For peripherals, I²C is mapped to SDA on GPIO18 and SCL on GPIO17, while TX/RX on GPIO43 and GPIO44 cover serial logging and flashing.
On the analog side there are 5 ADC-capable pins for sensors and battery monitoring and 1 capacitive-touch inputs.
If you want zero surprises, SCL, SDA, IO16 and IO15 are free of any such role - the safest first picks. 4 of the exposed pins carry boot-time or system duties on the ESP32-S3 (TX, RX, MISO and 1 more).
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module Flash Size: 16MB (128Mb) Flash Mode: DIO PSRAM: OPI PSRAM Partition Scheme: 16M Flash (3MB APP / 9.9MB FATFS) Upload Speed: 921600
// blink the onboard LED
void setup() {
pinMode(17, OUTPUT);
}
void loop() {
digitalWrite(17, HIGH); delay(500);
digitalWrite(17, LOW); delay(500);
}[env:lilygo_t5_4_7_epaper_v2_3]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_opi
build_flags = -DBOARD_HAS_PSRAMesp32-s3-devkitc-1 — or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: lilygo_t5_4_7_epaper_v2_3
framework:
type: esp-idf
psram:
mode: octal
speed: 80MHz
# blink - GPIO17
output:
- platform: gpio
pin: 17
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Specifications
ESP32-S3 · 119 × 64 mmAbout this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $39.99 - above the ~$30 typical for ESP32-S3 boards.
Only 11 GPIO are left for your own hardware - the display and onboard peripherals claim the rest.
Onboard you'll find 8MB (OPI) PSRAM, an ePaper 4.7" 540x960 display with touch, a microSD slot, a PCF8563 RTC and Reset/Boot buttons.
The LilyGo T5 4.7 Inch E-Paper V2.3 is the ESP32-S3 revision of LilyGo's 4.7-inch e-paper board - a 960×540 ED047TC1 panel with 16 grayscale levels, built for e-book readers, IoT dashboards and battery-powered signage.
It runs an ESP32-S3-WROOM-1 (WiFi 802.11 b/g/n + Bluetooth 5.0 LE, native USB) with 16MB Flash and 8MB PSRAM, and adds an optional GT911 capacitive touch overlay, an onboard microSD slot and a PCF8563 RTC over the original WROVER model.
Powered and programmed over USB-C, with a JST-PH 2.0 Li-Po connector and deep-sleep support. Note: the GPIO map differs from the original ESP32-WROVER T5 4.7.
- 4.7" ED047TC1 e-paper panel with 16 grayscale levels
- ESP32-S3-WROOM-1 (native USB, BLE 5.0) - the S3 revision of the T5 4.7; pinout differs from the original ESP32-WROVER model
- Optional GT911 2-point capacitive touch, an onboard microSD slot and a PCF8563 RTC
- JST-PH 2.0 Li-Po connector; 40-pin Raspberry-Pi-style expansion header
Where to buy
prices are typical street prices
Resources
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