Elecrow CrowPanel 7.0 (ESP32-S3)
The classic 7" 800x480 CrowPanel on an ESP32-S3 N4R8 - capacitive touch, RGB parallel panel and Crowtail ports. We reviewed it and later published the full ESPHome pin-mapping guide for it.
Elecrow CrowPanel 7.0 (ESP32-S3) Pinout
33 pins
| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 0 | IO0LCD_PCLKBOOT | strapping | - | Doubles as the RGB pixel clock AND the boot-strap pin - display glitches during flashing are normal |
| 2 | 1 | IO1LCD_G | safe | - | Internal - RGB panel data |
| 3 | 2 | IO2LCD_BL | safe | pwm | Display backlight - PWM dimmable (LEDC) |
| 4 | 3 | IO3LCD_G | strapping | - | Internal - RGB panel data |
| 5 | 4 | IO4LCD_B | safe | - | Internal - RGB panel data |
| 6 | 5 | IO5LCD_B | safe | - | Internal - RGB panel data |
| 7 | 6 | IO6LCD_B | safe | - | Internal - RGB panel data |
| 8 | 7 | IO7LCD_B | safe | - | Internal - RGB panel data |
| 9 | 8 | IO8LCD_G | safe | - | Internal - RGB panel data |
| 10 | 9 | IO9LCD_G | strapping | - | Internal - RGB panel data |
| 11 | 10 | IO10SD_CS | strapping | spi | microSD slot - chip select |
| 12 | 11 | IO11SD_MOSI | strapping | spi | microSD slot - MOSI |
| 13 | 12 | IO12SD_CLK | strapping | spi | microSD slot - clock |
| 14 | 13 | IO13SD_MISO | strapping | spi | microSD slot - MISO |
| 15 | 14 | IO14LCD_R | strapping | - | Internal - RGB panel data |
| 16 | 15 | IO15LCD_B | safe | - | Internal - RGB panel data |
| 17 | 16 | IO16LCD_G | safe | - | Internal - RGB panel data |
| 18 | 17 | IO17I2S_SDIN | safe | - | Internal I2S data to the NS4168 speaker amplifier |
| 19 | 18 | IO18I2S_LRCLK | safe | - | Internal I2S word clock to the NS4168 speaker amplifier |
| 20 | 19 | IO19SDA | uart | i2c | I2C ports - shared with the GT911 touch controller; add devices, don't repurpose |
| 21 | 20 | IO20SCL | uart | i2c | I2C ports - same shared bus as IO19 |
| 22 | 21 | IO21LCD_R | safe | - | Internal - RGB panel data |
| 23 | 38 | IO38GPIO_D | safe | - | The one free general-purpose pin, on the GPIO_D port |
| 24 | 39 | IO39LCD_HSYNC | strapping | - | Internal - RGB panel horizontal sync |
| 25 | 40 | IO40LCD_VSYNC | strapping | - | Internal - RGB panel vertical sync |
| 26 | 41 | IO41LCD_DE | strapping | - | Internal - RGB panel data enable |
| 27 | 42 | IO42I2S_BCLK | strapping | - | Internal I2S bit clock to the NS4168 speaker amplifier |
| 28 | 43 | IO43TXD0 | uart | uart | UART0 - CH340C USB-C flashing/logs, also on the UART0 port (5V input capable) |
| 29 | 44 | IO44RXD0 | uart | uart | UART0 - CH340C USB-C flashing/logs, also on the UART0 port (5V input capable) |
| 30 | 45 | IO45LCD_R | strapping | - | Internal - RGB panel data |
| 31 | 46 | IO46LCD_G | strapping | - | Internal - RGB panel data |
| 32 | 47 | IO47LCD_R | strapping | - | Internal - RGB panel data |
| 33 | 48 | IO48LCD_R | strapping | - | Internal - RGB panel data |
Start with these
13 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
18 pins · 12 things to knowIO0 Bootstrapping pin (Chip boot mode selection) Strapping
Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration.
IO3 Bootstrapping pin (controls JTAG signal source) Strapping
Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface.
IO9IO10IO11IO12IO13IO14 General-purpose SPI2 (FSPI) IO MUX pins Other
IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI.
- IO9General-purpose SPI2 (FSPI) IO MUX pin - hold/data line (FSPIHD)
- IO10General-purpose SPI2 (FSPI) IO MUX pin - chip select (FSPICS0)
- IO11General-purpose SPI2 (FSPI) IO MUX pin - data in (FSPID)
- IO12General-purpose SPI2 (FSPI) IO MUX pin - clock (FSPICLK)
- IO13General-purpose SPI2 (FSPI) IO MUX pin - data out (FSPIQ)
- IO14General-purpose SPI2 (FSPI) IO MUX pin - write-protect/data line (FSPIWP)
IO39 JTAG test clock (MTCK); IO MUX alternates CLK_OUT3 and SUBSPICS1 (chip select on the alternative SUBSPI memory bus, unused on standard modules) JTAG
Default JTAG TCK - keep it free if you debug over JTAG. It is not a flash or PSRAM line on standard modules: those sit on GPIO26-37.
IO40 JTAG test data out pin (MTDO) JTAG
Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality.
IO41 JTAG test data in pin (MTDI) JTAG
Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available.
IO42 JTAG test mode select pin (MTMS) JTAG
Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB).
IO43 UART0 transmit pin (U0TXD), default serial console TX UART
Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0).
IO44 UART0 receive pin (U0RXD), default serial console RX UART
Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip.
IO45 Bootstrapping pin (selects VDD_SPI flash voltage) Strapping
Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting.
IO46 Bootstrapping pin (used with GPIO0 for boot mode; controls ROM log output) Strapping
Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function.
IO47IO48 Octal SPI differential clock legs (SPICLK_P/N_DIFF), used only by the 1.8 V octal flash/PSRAM variants Other
Only the 1.8 V octal parts (ESP32-S3R8V, ESP32-S3R16V) run the differential memory clock here, and on those the pin works at 1.8 V instead of 3.3 V. On the common 3.3 V modules it is a normal GPIO - several devkits drive their RGB LED from GPIO48.
- IO47Octal SPI differential clock positive leg (SPICLK_P_DIFF), used only by the 1.8 V octal flash/PSRAM variants
- IO48Octal SPI differential clock negative leg (SPICLK_N_DIFF), used only by the 1.8 V octal flash/PSRAM variants
Only if you know the tricks
2 pins · 1 thing to knowIO19IO20 USB OTG differential data pair (D- and D+) USB
By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality.
- IO19USB OTG negative differential data line (USB_D-)
- IO20USB OTG positive differential data line (USB_D+)
The Elecrow CrowPanel 7.0 (ESP32-S3) pinout brings out 33 GPIO pins - every one of them usable in your project.
For peripherals, I²C is mapped to SDA on GPIO19 and SCL on GPIO20.
On the analog side there are PWM on 1 pins.
If you want zero surprises, IO1, IO2, IO4, IO5 and 9 more are free of any such role - the safest first picks. 18 of the exposed pins carry boot-time or system duties on the ESP32-S3 (IO0, IO3, IO9 and 15 more).
Pinout notes The 800x480 panel occupies the majority of the S3's pins as a 16-bit RGB bus - red on IO14/IO21/IO47/IO48/IO45, green on IO9/IO46/IO3/IO8/IO16/IO1, blue on…
The 800x480 panel occupies the majority of the S3's pins as a 16-bit RGB bus - red on IO14/IO21/IO47/IO48/IO45, green on IO9/IO46/IO3/IO8/IO16/IO1, blue on IO15/IO7/IO6/IO5/IO4, with DE on IO41, HSYNC/VSYNC on IO39/IO40 and - unusually - PCLK on IO0, the boot-strap pin. The backlight is PWM on IO2.
User-facing I/O lives on the back ports: two I2C ports on IO19 (SDA) / IO20 (SCL) - the same bus the GT911 touch controller uses - a GPIO_D port exposing IO38, and the UART0 port (IO43/IO44, shared with the CH340C USB-C flashing path, 5V input capable). The microSD slot runs SPI on IO10 (CS), IO11 (MOSI), IO12 (CLK), IO13 (MISO), and the NS4168 speaker amp takes I2S on IO17 (data), IO42 (bit clock), IO18 (word clock).
Practical upshot: IO38 is the only free general-purpose pin, so plan sensor expansion around I2C. And because IO0 moonlights as the pixel clock, a display refresh glitch during flashing is normal - use BOOT+RESET if a download won't start.
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module Flash Size: 4MB (32Mb) PSRAM: OPI PSRAM Partition Scheme: Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) Upload Speed: 921600
// toggle GPIO1 - wire an LED and resistor to it
void setup() {
pinMode(1, OUTPUT);
}
void loop() {
digitalWrite(1, HIGH); delay(500);
digitalWrite(1, LOW); delay(500);
}[env:elecrow-crowpanel-7-esp32-s3]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_opi
build_flags = -DBOARD_HAS_PSRAMesp32-s3-devkitc-1 - or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: esp32s3
framework:
type: esp-idf
psram:
mode: octal
speed: 80MHz
# blink - GPIO1
output:
- platform: gpio
pin: 1
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Good to know
board-specific quirks worth 60 seconds
When we first brought this panel up in ESPHome we got everything from a lit-but-blank backlight to marching artifacts - the 5-inch example config's pins simply don't apply. The correct 7.0 mapping (PCLK on IO0, DE IO41, HSYNC IO39, VSYNC IO40) plus octal-PSRAM sdkconfig flags fixed it for good.
The full working config is in our ESPHome guide for this exact panel - copy it verbatim, then build up.
The GT911 touch controller sits on the shared I2C bus (IO19/IO20) and the backlight is honest PWM on IO2 - so touch input and dimmable brightness both slot into ESPHome cleanly once the display works. We covered both in the follow-up guide.
Run the backlight LEDC output at ~1.2kHz - some panels whine audibly at lower PWM frequencies.
There is no pin header - you get Crowtail connectors: two I2C ports, a GPIO_D port with IO38, and the UART0 port that also accepts 5V power for installed panels. With the display consuming the rest of the GPIO, I2C sensor chains are the practical expansion path.
The I2C ports share the touch controller's bus - keep added devices off address 0x5D and expect touch traffic on the analyzer.
Gallery
5 photos
Specifications
ESP32-S3 · vs other ESP32 chips →About this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $29.40 - in line with other ESP32-S3 boards.
33 GPIO are broken out - more than most ESP32-S3 boards, so the pin budget is rarely the constraint.
Onboard you'll find 8MB (OPI) PSRAM, a TN TFT-LCD 7.0" 800x480 display with touch, a microSD slot, a speaker, a speaker connector (PH2.0-2P), an amplifier (NS4168), battery charging via PH2.0-2P and Boot/Reset buttons.
The Elecrow CrowPanel 7.0 is the original big CrowPanel - a 7-inch 800x480 capacitive touchscreen driven directly by an ESP32-S3-WROOM-1 N4R8 (4 MB flash, 8 MB octal PSRAM) over a 16-bit RGB parallel bus. We've spent more time with this panel than most: it was half of our CrowPanel roundup review, and later the subject of a full ESPHome bring-up guide where we worked out the correct pin mappings the hard way.
The screen itself is the strong suit - decent brightness, good viewing angles, and a GT911 capacitive touch layer that feels like a phone rather than a 2000s GPS unit. Around back you get the usual CrowPanel practicality: Crowtail I2C and GPIO ports, UART0 port doubling as a 5V input, microSD, a speaker output through an NS4168 I2S amplifier, and a battery connector with charging.
The trade-offs are generational. The S3 drives 800x480 adequately but not effortlessly - LVGL runs well with PSRAM buffering, though heavy animations will show their seams. Flash is only 4 MB, which fills quickly once LVGL assets and fonts pile up. And almost every GPIO is consumed by the display bus, so expansion is Crowtail-port-shaped: the shared I2C bus and IO38 are what's genuinely free.
If you're choosing within the family: the Advance 7.0 adds four times the flash, an RTC, a mic and the radio module socket for a few dollars more, and is the better default today. The classic 7.0 earns its keep when the price gap matters or when you're following the large body of existing projects and tutorials built around it - including our own ESPHome config, which you can copy verbatim.
- 7" 800x480 TN TFT-LCD panel (per Elecrow's spec) with GT911 capacitive touch, driven over a 16-bit RGB parallel bus
- ESP32-S3-WROOM-1 N4R8 - 4 MB flash, 8 MB octal PSRAM (PSRAM does the LVGL heavy lifting)
- Crowtail ports on the back - two I2C (IO19/IO20), GPIO_D (IO38), UART0 with 5V input
- microSD slot on its own SPI bus (IO10-IO13)
- Speaker output through an NS4168 I2S amplifier (PH2.0 connector)
- PH2.0 battery connector with onboard charging
- CH340C USB-C flashing; Boot and Reset buttons
- Ships with a demo firmware preloaded - it powers up doing something useful out of the box
- Fully documented ESPHome pin mapping - worked out and published in our bring-up guide
FAQ
5 common questionsDoes the CrowPanel 7.0 work with ESPHome?›
Why does my display show artifacts or flicker with ESPHome?›
Should I buy this or the Advance 7.0?›
Can I use TFT_eSPI with it?›
What pins are actually free for my own hardware?›
Where to buy
prices are typical street pricesResources
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