Heltec Wireless Tracker V2
ESP32-S3 LoRa and GNSS tracker board with SX1262 (28 dBm), dual-band UC6580 GNSS, 0.96" TFT and battery plus solar charging.
Heltec Wireless Tracker V2 Pinout
40 pins · 2.54 mm pitch
| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | - | GND | ground | - | Ground |
| 2 | - | 5V | power | - | 5V in (4.7-6V); 500 mA out only when USB powered |
| 3 | - | GND | ground | - | Ground |
| 4 | - | Vext | power | - | Switched 3.3V rail for TFT and GNSS, enabled by GPIO3; 350 mA max |
| 5 | - | GND | ground | - | Ground |
| 6 | - | Vext | power | - | Switched 3.3V rail for TFT and GNSS, enabled by GPIO3 |
| 7 | 15 | GPIO15U0RTSADC2_CH4 | uart | adc · pwm · uart | ADC2, unusable while Wi-Fi is active |
| 8 | 16 | GPIO16U0CTSADC2_CH5 | uart | adc · pwm · uart | ADC2, unusable while Wi-Fi is active |
| 9 | 19 | GPIO19USB_NU1CTSADC2_CH8 | uart | adc · uart | Native USB D-; wired to the USB-C port |
| 10 | 20 | GPIO20USB_PU1RTSADC2_CH9 | uart | adc · uart | Native USB D+; wired to the USB-C port |
| 11 | 18 | GPIO18U1RXDADC2_CH7LED_Write_Ctrl | uart | adc · pwm · uart | Connected on board as LED_Write_Ctrl per Heltec pin map |
| 12 | 17 | GPIO17U1TXDADC2_CH6 | uart | adc · pwm · uart | ADC2, unusable while Wi-Fi is active |
| 13 | 35 | GPIO35GNSS_RSTFSPID | safe | pwm · spi | GNSS reset; used by the onboard UC6580 |
| 14 | 36 | GPIO36PPSFSPICLK | safe | pwm · spi | GNSS PPS output; used by the onboard UC6580 |
| 15 | 37 | GPIO37FSPIQ | safe | pwm · spi | Free GPIO per Heltec pin map |
| 16 | 21 | GPIO21TFT_LED_K | safe | pwm | TFT backlight control |
| 17 | 48 | GPIO48 | strapping | pwm | No onboard connection shown in Heltec pin map |
| 18 | 47 | GPIO47 | strapping | pwm | No onboard connection shown in Heltec pin map |
| 19 | 33 | GPIO33GNSS_TXFSPIHD | uart | pwm · spi · uart | GNSS UART TX line; used by the onboard UC6580 |
| 20 | 34 | GPIO34GNSS_RXFSPICS0 | uart | pwm · spi · uart | GNSS UART RX line; used by the onboard UC6580 |
| 21 | - | GND | ground | - | Ground |
| 22 | - | 3V3 | power | - | 3.3V output (500 mA); can also power the board at 2.7-3.5V |
| 23 | 7 | GPIO7ADC1_CH6TOUCH7VFEM_Ctrl | safe | adc · touch · pwm | LoRa front-end power control (VFEM_Ctrl), pulled up |
| 24 | 6 | GPIO6ADC1_CH5TOUCH6 | safe | adc · touch · pwm | Free ADC1 pin, works with Wi-Fi |
| 25 | 5 | GPIO5ADC1_CH4TOUCH5PA_CTX | safe | adc · touch · pwm | LoRa PA control (PA_CTX), pulled down |
| 26 | 4 | GPIO4ADC1_CH3TOUCH4PA_CSD | safe | adc · touch · pwm | LoRa PA control (PA_CSD), pulled down |
| 27 | 3 | GPIO3ADC1_CH2TOUCH3Vext_Ctrl | strapping | adc · touch · pwm | Switches the Vext rail that powers the TFT and GNSS |
| 28 | 2 | GPIO2ADC1_CH1TOUCH2ADC_Ctrl | safe | adc · touch · pwm | Turns on the battery-sense divider |
| 29 | 1 | GPIO1ADC1_CH0TOUCH1Vbat_Read | safe | adc · touch · pwm | Battery voltage sense: VBAT = Vbat_Read * 4.9 |
| 30 | 0 | GPIO0USER_SW | strapping | pwm | User/boot button, pulled up |
| 31 | - | RSTRST_SW | control | - | Reset (chip enable), wired to the RST button |
| 32 | 38 | GPIO38TFT_CSFSPIWP | safe | pwm · spi | TFT chip select; used by the onboard display |
| 33 | 41 | GPIO41TFT_SCLKMTDI | strapping | pwm · spi | TFT SPI clock; also JTAG MTDI |
| 34 | 42 | GPIO42TFT_SDINMTMS | strapping | pwm · spi | TFT SPI data; also JTAG MTMS |
| 35 | 40 | GPIO40TFT_RSMTDO | strapping | pwm | TFT data/command (RS); also JTAG MTDO |
| 36 | 39 | GPIO39TFT_RESMTCK | strapping | pwm | TFT reset; also JTAG MTCK |
| 37 | 46 | GPIO46 | strapping | - | Heltec's datasheet table names it PA_CPS, but the V2.3 pin map leaves it unused and Meshtastic's V2 pin map drives the front end's CPS input from the SX1262 DIO2. Strapping pin |
| 38 | 45 | GPIO45 | strapping | pwm | Strapping pin (VDD_SPI voltage) |
| 39 | 44 | GPIO44U0RXD | uart | pwm · uart | UART0 RX |
| 40 | 43 | GPIO43U0TXD | uart | pwm · uart | UART0 TX |
Start with these
17 pins with no boot or system involvementFreely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
12 pins · 11 things to knowGPIO48GPIO47 Octal SPI differential clock legs (SPICLK_P/N_DIFF), used only by the 1.8 V octal flash/PSRAM variants Other
Only the 1.8 V octal parts (ESP32-S3R8V, ESP32-S3R16V) run the differential memory clock here, and on those the pin works at 1.8 V instead of 3.3 V. On the common 3.3 V modules it is a normal GPIO - several devkits drive their RGB LED from GPIO48.
- GPIO48Octal SPI differential clock negative leg (SPICLK_N_DIFF), used only by the 1.8 V octal flash/PSRAM variants
- GPIO47Octal SPI differential clock positive leg (SPICLK_P_DIFF), used only by the 1.8 V octal flash/PSRAM variants
GPIO3 Bootstrapping pin (controls JTAG signal source) Strapping
Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface.
GPIO0 Bootstrapping pin (Chip boot mode selection) Strapping
Must be pulled high (default) or low (to enter UART download mode) at reset. Using it for other functions can interfere with boot mode configuration.
GPIO41 JTAG test data in pin (MTDI) JTAG
Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available.
GPIO42 JTAG test mode select pin (MTMS) JTAG
Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB).
GPIO40 JTAG test data out pin (MTDO) JTAG
Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality.
GPIO39 JTAG test clock (MTCK); IO MUX alternates CLK_OUT3 and SUBSPICS1 (chip select on the alternative SUBSPI memory bus, unused on standard modules) JTAG
Default JTAG TCK - keep it free if you debug over JTAG. It is not a flash or PSRAM line on standard modules: those sit on GPIO26-37.
GPIO46 Bootstrapping pin (used with GPIO0 for boot mode; controls ROM log output) Strapping
Must be at a defined level during reset (with GPIO0) to select normal or download boot and UART/USB print mode. This pin is input-only (no output drive), so it should be left for its intended strapping function.
GPIO45 Bootstrapping pin (selects VDD_SPI flash voltage) Strapping
Determines flash/PSRAM power voltage (3.3 V vs 1.8 V) at boot. Must match hardware configuration; using as GPIO can upset flash supply setting.
GPIO44 UART0 receive pin (U0RXD), default serial console RX UART
Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip.
GPIO43 UART0 transmit pin (U0TXD), default serial console TX UART
Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0).
Only if you know the tricks
2 pins · 1 thing to knowGPIO19GPIO20 USB OTG differential data pair (D- and D+) USB
By default connected to the on-chip USB Serial/JTAG controller. Using it as general GPIO without reconfiguring IO MUX will interfere with USB functionality.
- GPIO19USB OTG negative differential data line (USB_D-)
- GPIO20USB OTG positive differential data line (USB_D+)
The Heltec Wireless Tracker V2 breaks out 40 pins in total: 31 GPIO for your project, with GND, 5V, Vext and 3V3 handling power.
On the analog side there are 13 ADC-capable pins for sensors and battery monitoring, PWM on 28 pins and 7 capacitive-touch inputs.
If you want zero surprises, GPIO15, GPIO16, GPIO18, GPIO17 and 13 more are free of any such role - the safest first picks. 12 of the exposed pins carry boot-time or system duties on the ESP32-S3 (GPIO48, GPIO47, GPIO3 and 9 more).
Getting started
flash your first firmware in ~2 minutesBoard: ESP32S3 Dev Module USB CDC On Boot: Enabled Flash Size: 8MB (64Mb) Partition Scheme: 8M with spiffs (3MB APP/1.5MB SPIFFS) Upload Speed: 921600
// toggle GPIO35 - wire an LED and resistor to it
void setup() {
pinMode(35, OUTPUT);
}
void loop() {
digitalWrite(35, HIGH); delay(500);
digitalWrite(35, LOW); delay(500);
}[env:heltec-wireless-tracker-v2]
platform = espressif32
board = esp32-s3-devkitc-1
framework = arduino
monitor_speed = 115200
upload_speed = 921600esp32-s3-devkitc-1 - or type it after board =.esp32:
board: esp32-s3-devkitc-1
variant: esp32s3
framework:
type: esp-idf
# blink - GPIO35
output:
- platform: gpio
pin: 35
id: led_out
light:
- platform: binary
name: "LED"
output: led_outesp32-s3-devkitc-1 (same ids as PlatformIO).esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Good to know
board-specific quirks worth 60 secondsThe TFT and the GNSS module run from the switched Vext rail, which GPIO3 (Vext_Ctrl) turns on. The display and GPS stay dark until your code enables it, so a blank screen or a silent GNSS UART usually means Vext is still off rather than a faulty board. Vext can supply 350 mA. Many header pins are already used on the board: the GNSS on GPIO33-36, the TFT on GPIO38-42 and GPIO21, and the LoRa RF front end on…
The TFT and the GNSS module run from the switched Vext rail, which GPIO3 (Vext_Ctrl) turns on. The display and GPS stay dark until your code enables it, so a blank screen or a silent GNSS UART usually means Vext is still off rather than a faulty board. Vext can supply 350 mA.
Many header pins are already used on the board: the GNSS on GPIO33-36, the TFT on GPIO38-42 and GPIO21, and the LoRa RF front end on GPIO4, GPIO5 and GPIO7. Check the pin map before you wire anything to these.
V2 (hardware V2.3) is not a straight copy of the original Wireless Tracker. It adds a new RF front-end module that raises LoRa TX power from 21 to 28 dBm, an RF filter, a GNSS LNA, a solar input and front-end control lines on GPIO4 (PA_CSD, chip enable), GPIO5 (PA_CTX) and GPIO7 (VFEM_Ctrl, front-end power). Use firmware and pin definitions meant for V2, not ones written for the first Tracker. The 5V header…
V2 (hardware V2.3) is not a straight copy of the original Wireless Tracker. It adds a new RF front-end module that raises LoRa TX power from 21 to 28 dBm, an RF filter, a GNSS LNA, a solar input and front-end control lines on GPIO4 (PA_CSD, chip enable), GPIO5 (PA_CTX) and GPIO7 (VFEM_Ctrl, front-end power). Use firmware and pin definitions meant for V2, not ones written for the first Tracker.
The 5V header pin supplies power (500 mA) only when the board runs from USB, and Heltec says to use only one power source at a time.
Downloads
Free for non-commercial use, credit espboards.dev · License
Board illustration
The bare Heltec Wireless Tracker V2 board drawn to scale at 53 × 25.4 mm, with no pin labels on it. Made for slide decks, wiring diagrams and project write-ups where a photo is too busy. Take the scalable SVG for print or editing, the high-resolution PNG to drop straight in, or the transparent PNG when you need it with no background behind it.
Pinout diagram
Every pin on both sides of the board with its functions, drawn by ESPboards from the ESP32-S3 Series Datasheet v2.2 - the same sheet shown at the top of this page. The PNG is a high-resolution image for screens, the SVG is vector so it stays sharp at any size, and the PDF is laid out to print on A4 or Letter.
Yours to use, share and adapt for non-commercial work, as long as you credit espboards.dev - the full terms and ready-made credit lines are here.
Specifications
ESP32-S3 · 53 × 25.4 mm · vs other ESP32 chips →Dimensions
About this board
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $30.90 - in line with other ESP32-S3 boards.
31 GPIO are broken out - more than most ESP32-S3 boards, so the pin budget is rarely the constraint.
Onboard you'll find a TFT 0.96" 160x80 display, LoRa (SX1262), GPS (UC6580), battery charging (CN3165) via SH1.25-2 and User (GPIO0)/Reset buttons.
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
- LoRa TX power up to 28 +/-1 dBm (863-928 MHz)
- Dual-frequency GNSS: GPS, GLONASS, BDS, Galileo, QZSS, SBAS, up to 10 Hz
- SH1.25 solar panel input alongside the battery connector
- 2.4 GHz spring antenna for Wi-Fi/BLE; u.FL (IPEX) connectors for LoRa and GNSS
- Battery voltage readable on GPIO1 through a divider switched by GPIO2 (VBAT = Vbat_Read * 4.9)
Where to buy
prices are typical street pricesResources
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