LilyGo T-Beam Supreme Development Board

Code name: LILYGO_T_BEAM_SUPREME

LilyGo T-Beam Supreme development board is based on esp32s3 microcontroller and uses xtensa architecture. This board has a maximum CPU frequency of 240 MHz and a flash size of 16MB.

About LilyGo T-Beam Supreme

πŸš€ The LilyGo T-Beam Supreme is an advanced ESP32-S3-based development board designed for LoRa and GPS applications. It integrates an ESP32-S3 dual-core processor with WiFi and Bluetooth 5, offering seamless connectivity. ⚑

πŸ“‘ Featuring an onboard LoRa transceiver (SX1262), the T-Beam Supreme supports long-range communication at 433/868/915 MHz. It also includes an upgraded Ublox GPS module for enhanced location tracking capabilities.

πŸ’Ύ The board is equipped with 16MB Flash and 8MB PSRAM, along with a 18650 Li-ion battery holder for portable applications, making it ideal for IoT, tracking, and telemetry projects.

LilyGo T-Beam Supreme Technical Specifications

πŸ–₯️ Display

Type OLED
Size 1.3"
Resolution 128x64
Driver SH1106

πŸ”Œ USB

Type USB-C

πŸ›°οΈ Connectivity

WiFi 802.11 b/g/n (2.4 GHz)
Bluetooth 5.0
BLE 5.0
Zigbee Yes
GPS Yes

🧠 Microcontroller

Model esp32s3
Clock Speed 240 MHz
Flash Size 16MB
PSRAM Size 8MB
Architecture xtensa

✨ Features

  • 48 digital IO pins
  • 46 external interrupt pins
  • 20 analog input pins
  • 27 PWM pins

LilyGo T-Beam Supreme Pinout

βœ… Safe Pins to Use

For general GPIO usage, these are the safest and most flexible choices:

πŸ”Ή IO1
πŸ”Ή IO2
πŸ”Ή IO16
πŸ”Ή IO17
πŸ”Ή IO18
πŸ”Ή IO21
πŸ”Ή IO22
πŸ”Ή IO23

Why Are These Pins Safe?

  • Not involved in bootstrapping β†’ No impact on device boot mode or system startup
  • Not linked to flash memory or PSRAM β†’ Won't interfere with storage or memory access
  • Not dedicated to USB or JTAG β†’ Free for general use without affecting debugging
  • No special hardware connections β†’ Freely assignable without internal conflicts

⚠️ Pins to Avoid or Use with Caution

Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage.

Critical Pin Categories:

  • πŸ› οΈ Strapping Pins: Control boot behavior and flash voltage selection
  • πŸ”— JTAG Debugging Pins: Required for low-level debugging
  • πŸ”Œ USB Communication Pins: Used for USB Serial/JTAG communication
  • ⚑ Flash Memory & SPI Pins: Connected to SPI flash memory and PSRAM
  • πŸ“‘ UART Serial Communication Pins: Used for debugging and firmware uploads
PINLabelReasonFunction
IO3GPIO3Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface.πŸ› οΈ Strapping
IO10FSPICS0Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity⚑ Flash
IO11FSPIDUsed as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use.⚑ Flash
IO12FSPICLKDrives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO.⚑ Flash
IO13FSPIQUsed as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected.⚑ Flash

LilyGo T-Beam Supreme Pin Mappings

This development board provides 48 digital IO pins, out of which 46 can be used as external interrupt pins , 20 as analog input pins and 27 pins have Pulse-Width Modulation (PWM) .

PinFunctionESP PinInput/OutputDescription
13V33.3VPOWER OUTPUT3.3V power output
2GNDGNDPOWER GROUNDGround connection
35V5VPOWER INPUT5V power input
4IO1GPIO1BIDIRECTIONALGPIO, ADC, I2C
5IO2GPIO2BIDIRECTIONALGPIO, ADC
6IO3GPIO3BIDIRECTIONALGPIO, ADC
7IO10SPI_CSBIDIRECTIONALGPIO, SPI Chip Select
8IO11SPI_DBIDIRECTIONALGPIO, SPI Data
9IO12SPI_CLKBIDIRECTIONALGPIO, SPI Clock
10IO13SPI_QBIDIRECTIONALGPIO, SPI Q
11IO16LORA_CSOUTPUTGPIO, LoRa Chip Select
12IO17LORA_RSTOUTPUTGPIO, LoRa Reset
13IO18LORA_IRQINPUTGPIO, LoRa Interrupt
14IO21GPS_TXOUTPUTGPS Module TX
15IO22GPS_RXINPUTGPS Module RX
16IO23BATTERYINPUTBattery Voltage Sense
Function Pin Function
ESP Pin Pin on ESP32
I/O Input/Output Pin
Description Pin Description

Default Tools for LilyGo T-Beam Supreme

Bootloader toolesptool_py
Uploader toolesptool_py
Network uploader toolesp_ota
Bootloader address0x0
Flash modedio
Boot modeqio
PSRAM typeopi
Maximum upload size
3072 Kb
(3145728 B)
Maximum data size
320 Kb
(327680 B)

The LilyGo T-Beam Supreme development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for LilyGo T-Beam Supreme development board by default is dio and qio respectively. The board uses opi PSRAM type. When using Arduino IDE, the maximum sketch upload size is 3072 Kb (3145728 B) and maximum data size for variables is 320 Kb (327680 B).