LilyGo T-Beam Supreme Development Board
Code name: LILYGO_T_BEAM_SUPREME
LilyGo T-Beam Supreme development board is based on esp32s3 microcontroller and uses xtensa architecture. This board has a maximum CPU frequency of 240 MHz and a flash size of 16MB.
About LilyGo T-Beam Supreme
π The LilyGo T-Beam Supreme is an advanced ESP32-S3-based development board designed for LoRa and GPS applications. It integrates an ESP32-S3 dual-core processor with WiFi and Bluetooth 5, offering seamless connectivity. β‘
π‘ Featuring an onboard LoRa transceiver (SX1262), the T-Beam Supreme supports long-range communication at 433/868/915 MHz. It also includes an upgraded Ublox GPS module for enhanced location tracking capabilities.
πΎ The board is equipped with 16MB Flash and 8MB PSRAM, along with a 18650 Li-ion battery holder for portable applications, making it ideal for IoT, tracking, and telemetry projects.
LilyGo T-Beam Supreme Technical Specifications
π₯οΈ Display
π USB
π°οΈ Connectivity
π§ Microcontroller
β¨ Features
- 48 digital IO pins
- 46 external interrupt pins
- 20 analog input pins
- 27 PWM pins
LilyGo T-Beam Supreme Pinout
β Safe Pins to Use
For general GPIO usage, these are the safest and most flexible choices:
Why Are These Pins Safe?
- Not involved in bootstrapping β No impact on device boot mode or system startup
- Not linked to flash memory or PSRAM β Won't interfere with storage or memory access
- Not dedicated to USB or JTAG β Free for general use without affecting debugging
- No special hardware connections β Freely assignable without internal conflicts
β οΈ Pins to Avoid or Use with Caution
Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage.
Critical Pin Categories:
- π οΈ Strapping Pins: Control boot behavior and flash voltage selection
- π JTAG Debugging Pins: Required for low-level debugging
- π USB Communication Pins: Used for USB Serial/JTAG communication
- β‘ Flash Memory & SPI Pins: Connected to SPI flash memory and PSRAM
- π‘ UART Serial Communication Pins: Used for debugging and firmware uploads
| PIN | Label | Reason | Function |
|---|---|---|---|
| IO3 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | π οΈ Strapping |
| IO10 | FSPICS0 | Used to select the external flash chip. It is required for flash access and cannot be repurposed without losing flash connectivity | β‘ Flash |
| IO11 | FSPID | Used as a data line for flash (and in-package PSRAM). It should not be used as GPIO when the flash/PSRAM is in use. | β‘ Flash |
| IO12 | FSPICLK | Drives the flash (and PSRAM) clock. This critical signal must be reserved for memory and not used as general GPIO. | β‘ Flash |
| IO13 | FSPIQ | Used as a data line for flash/PSRAM transfers. Not available for other uses when flash/PSRAM is connected. | β‘ Flash |
LilyGo T-Beam Supreme Pin Mappings
This development board provides 48 digital IO pins, out of which 46 can be used as external interrupt pins , 20 as analog input pins and 27 pins have Pulse-Width Modulation (PWM) .
| Pin | Function | ESP Pin | Input/Output | Description |
|---|---|---|---|---|
| 1 | 3V3 | 3.3V | POWER OUTPUT | 3.3V power output |
| 2 | GND | GND | POWER GROUND | Ground connection |
| 3 | 5V | 5V | POWER INPUT | 5V power input |
| 4 | IO1 | GPIO1 | BIDIRECTIONAL | GPIO, ADC, I2C |
| 5 | IO2 | GPIO2 | BIDIRECTIONAL | GPIO, ADC |
| 6 | IO3 | GPIO3 | BIDIRECTIONAL | GPIO, ADC |
| 7 | IO10 | SPI_CS | BIDIRECTIONAL | GPIO, SPI Chip Select |
| 8 | IO11 | SPI_D | BIDIRECTIONAL | GPIO, SPI Data |
| 9 | IO12 | SPI_CLK | BIDIRECTIONAL | GPIO, SPI Clock |
| 10 | IO13 | SPI_Q | BIDIRECTIONAL | GPIO, SPI Q |
| 11 | IO16 | LORA_CS | OUTPUT | GPIO, LoRa Chip Select |
| 12 | IO17 | LORA_RST | OUTPUT | GPIO, LoRa Reset |
| 13 | IO18 | LORA_IRQ | INPUT | GPIO, LoRa Interrupt |
| 14 | IO21 | GPS_TX | OUTPUT | GPS Module TX |
| 15 | IO22 | GPS_RX | INPUT | GPS Module RX |
| 16 | IO23 | BATTERY | INPUT | Battery Voltage Sense |
Default Tools for LilyGo T-Beam Supreme
| Bootloader tool | esptool_py |
| Uploader tool | esptool_py |
| Network uploader tool | esp_ota |
| Bootloader address | 0x0 |
| Flash mode | dio |
| Boot mode | qio |
| PSRAM type | opi |
| Maximum upload size | 3072 Kb (3145728 B) |
| Maximum data size | 320 Kb (327680 B) |
The LilyGo T-Beam Supreme development board by default uses esptool_py uploader tool, esp_ota network uploader tool for Over-the-air (OTA) uploads and esptool_py bootloader tool. The bootloader starts at address "0x0". Flash mode and boot mode for LilyGo T-Beam Supreme development board by default is dio and qio respectively. The board uses opi PSRAM type. When using Arduino IDE, the maximum sketch upload size is 3072 Kb (3145728 B) and maximum data size for variables is 320 Kb (327680 B).




