No
No
N/A
XIAO ESP32S3 Plus
XIAO ESP32S3 with 16 MB flash, 8 MB PSRAM and extra I/O pads on the back for projects that outgrow the standard board.
21 × 17.8 mm
ESP32-S3
MCU
240MHz
clock
16MB
flash
512KB
SRAM
20· 13 ADC
GPIO
BLE 5.0+ WiFi
radio
Pinout
23 pins · 2.54 mm pitch
| Pin | GPIO | Labels | Status | Capabilities | Notes |
|---|---|---|---|---|---|
| 1 | 1 | D0A0GPIO1 | safe | adc · touch · pwm | |
| 2 | 2 | D1A1GPIO2 | safe | adc · touch · pwm | |
| 3 | 3 | D2A2GPIO3 | strapping | adc · touch · pwm | |
| 4 | 4 | D3A3GPIO4 | safe | adc · touch · pwm | |
| 5 | 5 | D4A4SDAGPIO5 | safe | adc · touch · pwm · i2c | |
| 6 | 6 | D5A5SCLGPIO6 | safe | adc · touch · pwm · i2c | |
| 7 | 43 | D6TXGPIO43 | strapping | uart · pwm | |
| 8 | - | 5V | power | - | 5V power input/output |
| 9 | - | GND | ground | - | |
| 10 | - | 3V3 | power | - | 3.3V power |
| 11 | 9 | D10A10MOSIGPIO9 | strapping | adc · touch · pwm · spi | |
| 12 | 8 | D9A9MISOGPIO8 | safe | adc · touch · pwm · spi | |
| 13 | 7 | D8A8SCKGPIO7 | safe | adc · touch · pwm · spi | |
| 14 | 44 | D7RXGPIO44 | strapping | uart · pwm | |
| 15 | 38 | D11GPIO38I2S_SD | safe | pwm | Back-side pad |
| 16 | 39 | D12GPIO39I2S_SCKMTCK | strapping | pwm | Back-side pad; also on the MTCK test pad (JTAG TCK) |
| 17 | 40 | D13GPIO40I2S_WSMTDO | strapping | pwm | Back-side pad; also on the MTDO test pad (JTAG TDO) |
| 18 | 41 | D14GPIO41RX1MTDI | strapping | uart · pwm | Back-side pad; Serial1 RX by default; also on the MTDI test pad (JTAG TDI) |
| 19 | 42 | D15GPIO42TX1MTMS | strapping | uart · pwm | Back-side pad; Serial1 TX by default; also on the MTMS test pad (JTAG TMS) |
| 20 | 10 | D16GPIO10ADC_BAT | strapping | adc · touch · pwm | Back-side pad; reads the battery voltage divider (ADC1) |
| 21 | 13 | D17GPIO13SCK1 | strapping | adc · touch · pwm · spi | Back-side pad; ADC2 |
| 22 | 12 | D18GPIO12MISO1 | strapping | adc · touch · pwm · spi | Back-side pad; ADC2 |
| 23 | 11 | D19GPIO11MOSI1 | strapping | adc · touch · pwm · spi | Back-side pad; ADC2 |
Start with these
8 pins with no boot or system involvementD0A0D1A1D3A3D4A4D5A5D9A9D8A8D11GPIO38
Freely assignable - no strapping, flash, USB or JTAG duties. Ideal first picks for buttons, sensors and LEDs.
Fine - with a little care
sampled at boot or shared with debug/serial| Pin | Label | What to know | Role |
|---|---|---|---|
| D2 | GPIO3 | Sampled at reset to select JTAG interface (USB Serial/JTAG controller vs. external pins). Improper use can disable external JTAG or alter debug interface. | Strapping |
| D6 | U0TXD (GPIO43) | Used for bootloader output and UART console logs. If repurposed, you will lose the default serial output (and programming via UART0). | Other |
| D10 | FSPIHD | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| D7 | U0RXD (GPIO44) | Used for bootloader input (download mode via serial). If repurposed, you cannot use the default UART0 download mode for programming the chip. | Other |
| D12 | MTCK (GPIO39) | Default JTAG TCK - keep it free if you debug over JTAG. It is not a flash or PSRAM line on standard modules: those sit on GPIO26-37. | Other |
| D13 | MTDO (GPIO40) | Default JTAG TDO output for debugging. Using it as GPIO will interfere with JTAG debugging functionality. | Other |
| D14 | MTDI (GPIO41) | Default JTAG TDI input for debugging. Should be reserved for JTAG or left unused if JTAG is to remain available. | Other |
| D15 | MTMS (GPIO42) | Default JTAG TMS signal for debugging. Using this pin for other purposes will disable the JTAG interface (unless JTAG is rerouted to USB). | Other |
| D16 | FSPICS0 | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| D17 | FSPIQ | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| D18 | FSPICLK | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| D19 | FSPID | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet lists it as a priority-2 pin ("can be freely used without restrictions"), so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
These are recommendations, not hard rules - with the right pull-ups, timing and boot-state awareness most pins can be made to work. When in doubt, start green.
Pinout notes Across 23 pins (2.54 mm pitch), the XIAO ESP32S3 Plus exposes 20 GPIO plus 5V, GND and 3V3 for power. For peripherals, I²C is mapped to SDA on GPIO5 and SCL on…
Across 23 pins (2.54 mm pitch), the XIAO ESP32S3 Plus exposes 20 GPIO plus 5V, GND and 3V3 for power.
For peripherals, I²C is mapped to SDA on GPIO5 and SCL on GPIO6; the SPI bus (MOSI, MISO, SCK) is broken out in full; TX/RX on GPIO43 and GPIO44 cover serial logging and flashing.
On the analog side there are 13 ADC-capable pins for sensors and battery monitoring, PWM on every GPIO and 13 capacitive-touch inputs.
If you want zero surprises, D0, D1, D3, D4 and 4 more are free of any such role - the safest first picks. 12 of the exposed pins carry boot-time or system duties on the ESP32-S3 (D2, D6, D10 and 9 more).
Getting started
flash your first firmware in ~2 minutes1
Connect over USB
Native USB - shows up as a port right away, no driver needed. Not detected? Hold BOOT while plugging in.
2
Match & flash
Set the Tools options shown, then click Upload.
3
Verify it runs
The onboard user LED on GPIO21 blinks.
Set these in Tools · leave everything else at default
Arduino IDE 2.x - Tools Copy
Board: "XIAO_ESP32S3_PLUS"▸
USB CDC On Boot: "Enabled"▸
Flash Size: "16MB (128Mb)"▸
Flash Mode: "DIO"▸
PSRAM: "OPI PSRAM"▸
Partition Scheme: "16M Flash (2MB APP/12.5MB FATFS)" (default)▸
Upload Speed: "921600"▸
▸ every other Tools option - leave at default
Board: XIAO_ESP32S3_PLUS USB CDC On Boot: Enabled Flash Size: 16MB (128Mb) Flash Mode: DIO PSRAM: OPI PSRAM Partition Scheme: 16M Flash (2MB APP/12.5MB FATFS) Upload Speed: 921600
Find it: Tools ▸ Board ▸ ESP32 Arduino ▸ XIAO_ESP32S3_PLUS
// blink the onboard user LED
void setup() {
pinMode(21, OUTPUT);
}
void loop() {
digitalWrite(21, HIGH); delay(500);
digitalWrite(21, LOW); delay(500);
}board to selectseeed_xiao_esp32s3⧉ copy
[env:xiao-esp32s3-plus]
platform = espressif32
board = seeed_xiao_esp32s3
framework = arduino
monitor_speed = 115200
upload_speed = 921600
board_build.arduino.memory_type = qio_opi
build_flags = -DBOARD_HAS_PSRAMFind it: PlatformIO Home ▸ Boards, search
seeed_xiao_esp32s3 - or type it after board =.board to selectseeed_xiao_esp32s3⧉ copy
esp32:
board: seeed_xiao_esp32s3
variant: esp32s3
framework:
type: esp-idf
psram:
mode: octal
speed: 80MHz
# blink - GPIO21
output:
- platform: gpio
pin: 21
id: led_out
light:
- platform: binary
name: "LED"
output: led_outFind it: search ESPHome's board list for
seeed_xiao_esp32s3 (same ids as PlatformIO).esptool doesn't pick board settings - a prebuilt .bin already has them baked in. This is just the raw flash command.
esptool.py --chip esp32s3 --port /dev/ttyACM0 \
--baud 921600 write_flash 0x0 firmware.bin--port = your /dev/tty* (macOS/Linux) or COMx (Windows).Build details: sketch space 2097152 B · data 327680 B · DIO
Good to know
board-specific quirks worth 60 seconds
Nine extra GPIOs - but you have to reflow the board
The 14 edge pads keep the XIAO's 2.54 mm pitch and are the same as on every other XIAO. What the Plus adds is a redesigned pad layout on the back of the board, and those pads are only reachable by soldering the board flat onto a carrier PCB - there is nothing to plug a header into. Per Seeed's pin map, the extra pads are: D11 GPIO38, D12 GPIO39, D13 GPIO40, D14 GPIO41, D15 GPIO42 D16 GPIO10, D17 GPIO13, D18 GPIO12,…
The 14 edge pads keep the XIAO's 2.54 mm pitch and are the same as on every other XIAO. What the Plus adds is a redesigned pad layout on the back of the board, and those pads are only reachable by soldering the board flat onto a carrier PCB - there is nothing to plug a header into.
Per Seeed's pin map, the extra pads are:
- D11 GPIO38, D12 GPIO39, D13 GPIO40, D14 GPIO41, D15 GPIO42
- D16 GPIO10, D17 GPIO13, D18 GPIO12, D19 GPIO11
They are what turns the standard board's "1x UART, 1x SPI" into 2x UART, 2x SPI and an I2S port in the spec table: the arduino-esp32 variant maps TX1/RX1 to GPIO42/41, MOSI1/MISO1/SCK1 to GPIO11/12/13, and I2S_SD/I2S_SCK/I2S_WS to GPIO38/39/40. GPIO39 to GPIO42 double as the chip's external JTAG pins (MTCK, MTDO, MTDI, MTMS), so leave them free if you plan to attach an external JTAG adapter (the S3's built-in USB JTAG needs none of them).
D16 is also the battery sense pin. The Plus routes the cell to GPIO10 as ADC_BAT (BAT_VOLT_PIN in the variant) - the plain XIAO ESP32S3 has no such pin. If you use D16 as ordinary I/O, you give up reading the battery voltage in software.
D11-D15 are digital-only despite what some pinout tables show. On the ESP32-S3 the ADC lives on GPIO1-10 (ADC1) and GPIO11-20 (ADC2), so GPIO38-42 have no ADC channel at all. The nine ADC pins Seeed counts in the spec table are the edge ones - D0-D5, D8, D9, D10 - though the back pads on GPIO10-13 sit on ADC1/ADC2 too, and GPIO10 is the one wired to the battery divider as ADC_BAT.
Specifications
ESP32-S3 · 21 × 17.8 mm · vs other ESP32 chips →Compute
MCU
ESP32-S3
Clock
240 MHz
SRAM · Flash
512 KB · 16MB · 8MB (OPI) PSRAM
Radio
Wi-Fi
802.11 b/g/n
Bluetooth
5.0 LE
Antenna
u.FL
I/O
GPIO · ADC
20 · 13
UART · I²C · SPI
3 · 2 · 2
PWM
8 channels
Power
USB
USB-C
Serial
Native (CDC)
Boot address
0x0
Electrical
Input
5V USB-C · 3.7V LiPo
Consumption
81mA active · 33.51µA sleep
Regulator
-
Flashing
Upload · OTA
esptool_py · esp_ota
Flash · Boot mode
DIO · QIO
Sketch · Data
2 MB · 320 KB
21 × 17.8 mm · pin pitch 2.54 mm
The XIAO ESP32S3 Plus uses esptool_py for firmware uploads, esp_ota for over-the-air (OTA) updates. Flash mode is DIO with QIO boot mode. The maximum sketch size is 2 MB with 320 KB available for data.
About this board
At 21 × 17.8 mm it's among the smallest boards in the whole ESP32 family.
At its core is the ESP32-S3 - a dual-core Xtensa with vector extensions suited to AI workloads.
Expect to pay about $7.90 - less than the ~$29 most ESP32-S3 boards go for.
Onboard you'll find 8MB (OPI) PSRAM, battery charging via Solder pads, status LEDs (User, Charge) and Reset/Boot buttons.
It flashes over native USB - no serial-converter driver needed, which isn't a given among ESP32-S3 boards.
The XIAO ESP32S3 Plus keeps the 21 x 17.8 mm XIAO footprint and the ESP32-S3R8 (dual-core Xtensa LX7 at up to 240 MHz, 8 MB PSRAM in the package) of the standard S3, and doubles the flash to 16 MB. Wireless is unchanged: a U.FL connector for the 2.4 GHz rod antenna that ships in the box. The other change is I/O: Seeed redesigned the back of the board with extra pads that bring out nine more GPIOs - D11 to D19, which are GPIO38, 39, 40, 41, 42, 10, 13, 12 and 11 - on top of the 11 on the edge castellations. The variant names them as a second UART, a second SPI bus and an I2S port - on the ESP32-S3 these route through the GPIO matrix, so what the Plus really adds is nine more pins.
The battery circuit is beefier too - 100 mA fast charge (0.9 mA trickle) against 50 mA on the standard board - at the cost of a higher deep-sleep floor of 33.51 µA against 14 µA. There is no IMU or other sensor onboard; the Plus is about memory and pins, not peripherals. It also carries a B2B connector, which Seeed's wiki says fits the Wio-SX1262 expansion board but not the plug-in camera board that goes with the Sense.
Programming runs over the S3's native USB - there is no separate serial chip - and arduino-esp32 lists the board as XIAO_ESP32S3_PLUS (set Tools → PSRAM to "OPI PSRAM"). PlatformIO's official espressif32 platform has no Plus board file, so build against the plain
seeed_xiao_esp32s3 id and override the flash size with board_upload.flash_size = 16MB in platformio.ini; the pioarduino fork ships a seeed_xiao_esp32_s3_plus board that already sets it (its manifest still uses the default 8 MB partition table, so a 16 MB partition scheme is still your job). Boards ship without pin headers unless you pick the pre-soldered option in the store.- Dual-core Xtensa LX7 at up to 240 MHz with 8MB PSRAM and 16MB flash
- Nine extra GPIOs on pads on the back: D11-D19 (GPIO38, 39, 40, 41, 42, 10, 13, 12, 11)
- Second UART, second SPI bus and an I2S port on those extra pads
- B2B connector - fits the Wio-SX1262 board, not the Sense camera board
- Supports WiFi 4, Bluetooth LE 5.0 and Bluetooth Mesh
- Battery charging at 100mA fast / 0.9mA trickle, deep sleep 33.51µA
- Ultra-small size (21 x 17.8 mm)
Where to buy
prices are typical street pricesAs an Amazon Associate, ESPboards earns from qualifying purchases.
The Seeed Studio store link is an affiliate link - ESPboards may earn a commission on purchases, at no extra cost to you.
Resources
Board datasheet wiki.seeedstudio.com↗ Schematic files.seeedstudio.com↗ 3D model grabcad.com↗ KiCad files files.seeedstudio.com↗ ESP32-S3 datasheet espressif.com↗ XIAO ESP32S3 Plus Product Page (Seeed Studio) seeedstudio.com↗XIAO ESP32-S3 Series Getting Started (Seeed Wiki) wiki.seeedstudio.com↗XIAO ESP32-S3 Plus Pinout Sheet (Seeed Studio, XLSX) files.seeedstudio.com↗Espressif ESP32-S3 product page (WiFi 4 + BLE 5, dual-core LX7) espressif.com↗
Similar boards
