ESP32-C6 Development Boards
The ESP32-C6 introduces Wi-Fi 6 (802.11ax) and BLE 5.3 for next-gen IoT. It’s also the first ESP chip to support Thread and Zigbee (802.15.4), making it ideal for Matter-compatible smart home devices.
Built on a RISC-V core, the C6 supports secure OTA, IPv6, and robust RF performance. It’s great for low-latency, low-power mesh networks, and future-proof IoT ecosystems.
Single-core
RISC-V cores
160 MHz
Max clock
512 KB
SRAM
7
Boards
Specifications
Datasheet ↗Compute
CPURISC-V single-core 32-bit
Clock160 MHz
SRAM512 KB
Operating temp-40 to 85 °C
Connectivity
Wi-Fi802.11 ax b/g/n (2.4 GHz)
Bluetooth5.3
BLE5.3
Thread / Zigbee802.15.4 (Thread / Zigbee)
Peripherals
ADCOne 12-bit, 7 Channels
SPI2
I²C2
I²S1
RMT2 Channels
UART2
PWM6
Strapping & reserved pins
20 pins to knowSome pins are reserved for boot strapping, JTAG, USB and flash - misusing them can cause boot failures or programming issues. The category colours below match the table.
Strapping boot mode & flash voltage JTAG low-level debugging USB native USB Serial/JTAG Flash / SPI flash & PSRAM lines UART debug & firmware upload
| Pin | Label | Why avoid | Category |
|---|---|---|---|
| IO4 | MTMS | Used during boot; required for JTAG debugging; flash data in internal-flash models. | Strapping |
| IO5 | MTDI | Used during boot; required for JTAG debugging; flash data in internal-flash models. | Strapping |
| IO6 | MTCK | Required for JTAG debugging; connected to flash clock in internal-flash models. | JTAG |
| IO7 | MTDO | Required for JTAG debugging; connected to flash data in internal-flash models. | JTAG |
| IO8 | GPIO8 | Determines boot mode; pulling low at reset can prevent normal boot. | Strapping |
| IO9 | GPIO9 | Pulling low on reset forces the ESP32-C6 into download mode instead of normal boot. | Strapping |
| IO12 | USB_D- | Dedicated to USB communication; avoid if using USB functionality. | USB |
| IO13 | USB_D+ | Dedicated to USB communication; avoid if using USB functionality. | USB |
| IO15 | JTAG_SEL | Controls JTAG input source at boot; avoid altering its state. | JTAG |
| IO16 | U0TXD | Default UART0 transmit pin; using it may interfere with serial console or programming. | UART |
| IO17 | U0RXD | Default UART0 receive pin; using it may interfere with serial console or programming. | UART |
| IO18 | FSPIQ | Connected to internal flash; using as GPIO can disrupt flash operations. | Flash |
| IO19 | FSPID | Connected to internal flash; using as GPIO can disrupt flash operations. | Flash |
| IO24 | FSPICS0 | Reserved for SPI flash chip selection; using as GPIO will interfere with flash. | Flash |
| IO25 | FSPIQ | Used by SPI flash; avoid using as GPIO. | Flash |
| IO26 | FSPIWP | Used by SPI flash for write protection; avoid using as GPIO. | Flash |
| IO27 | FSPIHD | Used by SPI flash; avoid using as GPIO. | Flash |
| IO28 | FSPIHD | Used by SPI flash; avoid using as GPIO. | Flash |
| IO29 | FSPICLK | SPI flash clock signal; must not be repurposed as GPIO. | Flash |
| IO30 | FSPID | Used for SPI flash data transfer; using as GPIO will cause flash issues. | Flash |
ESP32-C6 modules & revisions
4 variants
