esp32c6 Development Boards

The list of esp32c6 development boards, complete with pinouts, technical specifications, datasheets and more.

The ESP32-C6 introduces Wi-Fi 6 (802.11ax) and BLE 5.3 for next-gen IoT. It’s also the first ESP chip to support Thread and Zigbee (802.15.4), making it ideal for Matter-compatible smart home devices.

Built on a RISC-V core, the C6 supports secure OTA, IPv6, and robust RF performance. It’s great for low-latency, low-power mesh networks, and future-proof IoT ecosystems.

Technical Specifications

🧠 Microcontroller

Microcontroller RISC-V single-core 32-bit
Frequency Up to 160 MHz

πŸ“‘ Connectivity

WiFi 802.11 ax b/g/n (2.4 GHz)
Bluetooth 5.3
BLE 5.3

πŸ”Œ Interfaces

Analog-Digital Converter (ADC) One 12-bit, 7 Channels
SPI 2
I2C 2
I2S 1
RMT 2 Channels

Strapping Pins

Some pins are reserved for critical functions like bootstrapping, JTAG debugging, USB communication, and flash memory operations. Misusing these pins may lead to boot failures, programming issues, USB conflicts, or disruptions in flash storage.

Critical Pin Categories:

  • πŸ› οΈ Strapping Pins: Control boot behavior and flash voltage selection
  • πŸ”— JTAG Debugging Pins: Required for low-level debugging
  • πŸ”Œ USB Communication Pins: Used for USB Serial/JTAG communication
  • ⚑ Flash Memory & SPI Pins: Connected to SPI flash memory and PSRAM
  • πŸ“‘ UART Serial Communication Pins: Used for debugging and firmware uploads
PINLabelReasonFunction
IO4MTMSUsed during boot; required for JTAG debugging; flash data in internal-flash models.πŸ› οΈ Strapping
IO5MTDIUsed during boot; required for JTAG debugging; flash data in internal-flash models.πŸ› οΈ Strapping
IO6MTCKRequired for JTAG debugging; connected to flash clock in internal-flash models.πŸ”— JTAG
IO7MTDORequired for JTAG debugging; connected to flash data in internal-flash models.πŸ”— JTAG
IO8GPIO8Determines boot mode; pulling low at reset can prevent normal boot.πŸ› οΈ Strapping