ESP32-S2 Development Boards
The ESP32-S2 is a single-core Wi-Fi SoC designed for secure IoT applications. It adds advanced hardware security features like cryptographic acceleration, secure boot, and flash encryption, making it ideal for connected appliances, smart locks, and enterprise IoT.
While it does not support Bluetooth, it includes native USB OTG, making it great for USB devices or web USB interfaces. Developers use the ESP-IDF or Arduino Core with full support.
Specifications
Datasheet ↗Compute
Connectivity
Peripherals
Strapping & reserved pins
29 pins to knowSome pins are reserved for boot strapping, JTAG, USB and flash - misusing them can cause boot failures or programming issues. The category colours below match the table.
| Pin | Label | Why avoid | Category |
|---|---|---|---|
| IO0 | GPIO0 | Must be pulled high for normal boot; pulling low at reset enters bootloader (download mode). Also serves as SPI flash data-in (SPID) line when using external flash memory. | Strapping |
| IO9 | FSPIHD | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO10 | FSPICS0 | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO11 | FSPID | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO12 | FSPICLK | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO13 | FSPIQ | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO14 | FSPIWP | IO MUX pin of the general-purpose SPI2 (FSPI) bus, not of the in-package flash - that sits on GPIO26-32. The datasheet does not restrict it, so it is only taken if your board wires flash, an SD card or a display to FSPI. | Other |
| IO15 | XTAL_32K_P | If an external 32 kHz crystal is used for RTC, this pin is dedicated to the crystal and cannot be used as GPIO. | Other |
| IO16 | XTAL_32K_N | If using an external 32 kHz crystal, this pin is connected to the crystal and should not be used as general I/O. | Other |
| IO19 | USB_D- | Used for USB communication; using this pin as general GPIO can interfere with USB functionality. | USB |
| IO20 | USB_D+ | Dedicated to USB interface; repurposing as GPIO may disrupt USB connectivity. | USB |
| IO26 | SPICS1 | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO27 | SPIHD | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO28 | SPIWP | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO29 | SPICS0 | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO30 | SPICLK | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO31 | SPIQ | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO32 | SPID | Part of the SPI0/1 bus that runs the in-package flash and PSRAM, listed by the datasheet as "already allocated or not recommended for use". Modules keep these lines internal, so the pin is not available as GPIO. | Flash |
| IO33 | SPIIO4 (GPIO33) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode, and can be GPIO pins if the chip is not connected to flash or PSRAM in 8-line SPI mode". Quad-SPI parts leave it free. | Flash |
| IO34 | SPIIO5 (GPIO34) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode, and can be GPIO pins if the chip is not connected to flash or PSRAM in 8-line SPI mode". Quad-SPI parts leave it free. | Flash |
| IO35 | SPIIO6 (GPIO35) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode, and can be GPIO pins if the chip is not connected to flash or PSRAM in 8-line SPI mode". Quad-SPI parts leave it free. | Flash |
| IO36 | SPIIO7 (GPIO36) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode, and can be GPIO pins if the chip is not connected to flash or PSRAM in 8-line SPI mode". Quad-SPI parts leave it free. | Flash |
| IO37 | SPIDQS (GPIO37) | The datasheet keeps GPIO33-37 for "the higher 4 bits data line interface and DQS interface for the SPI0/1 interface in 8-line SPI mode, and can be GPIO pins if the chip is not connected to flash or PSRAM in 8-line SPI mode". Quad-SPI parts leave it free. | Flash |
| IO39 | MTCK | Used for JTAG debugging interface; using this pin for other purposes will disable JTAG clock input. | JTAG |
| IO40 | MTDO | Part of JTAG interface (TDO); should be avoided as GPIO if JTAG debugging is needed. | JTAG |
| IO41 | MTDI | Part of JTAG interface (TDI); avoid using as GPIO to retain ability for JTAG debug. | JTAG |
| IO42 | MTMS | JTAG TMS pin; should not be repurposed if JTAG debugging or programming via JTAG is required. | JTAG |
| IO45 | GPIO45 | Must be set correctly at boot (usually low for 3.3 V); improper level can cause boot failure or flash malfunction. | Strapping |
| IO46 | GPIO46 | If pulled high during boot, it can disable bootloader log output (depending on eFuse settings). Cannot drive output (input-only pin). | Strapping |
ESP32-S2 modules & revisions
12 variants











ESP32-S2 boards
26 boards

























