ESP32-S2 Development Boards
The ESP32-S2 is a single-core Wi-Fi SoC designed for secure IoT applications. It adds advanced hardware security features like cryptographic acceleration, secure boot, and flash encryption, making it ideal for connected appliances, smart locks, and enterprise IoT.
While it does not support Bluetooth, it includes native USB OTG, making it great for USB devices or web USB interfaces. Developers use the ESP-IDF or Arduino Core with full support.
Single-core
Xtensa cores
240 MHz
Max clock
320 KB
SRAM
26
Boards
Specifications
Datasheet ↗Compute
CPUXtensa single-core 32-bit LX7
Clock240 MHz
SRAM320 KB
Operating temp-40 to 85 °C
Connectivity
Wi-Fi802.11 b/g/n 2.4 GHz
BluetoothNone
BLENone
Peripherals
ADCTwo 13-bit, 20 Channels
DACTwo 8-bit Channels
SPI4
I²C1
I²S1
RMT4 Channels
Touch14
UART2
PWM8
Strapping & reserved pins
28 pins to knowSome pins are reserved for boot strapping, JTAG, USB and flash - misusing them can cause boot failures or programming issues. The category colours below match the table.
Strapping boot mode & flash voltage JTAG low-level debugging USB native USB Serial/JTAG Flash / SPI flash & PSRAM lines UART debug & firmware upload
| Pin | Label | Why avoid | Category |
|---|---|---|---|
| IO0 | GPIO0 | Must be pulled high for normal boot; pulling low at reset enters bootloader (download mode). Also serves as SPI flash data-in (SPID) line when using external flash memory. | Strapping |
| IO9 | FSPIHD | Typically used as flash/PSRAM IO line in certain configurations; avoid using as GPIO if flash or PSRAM is present. | Flash |
| IO10 | FSPICS0 | Often used as flash chip select in some designs; not available for GPIO when controlling flash. | Flash |
| IO11 | FSPID | Used for flash data transfer in certain configurations; should be avoided for general use if flash is connected. | Flash |
| IO12 | FSPICLK | Used as flash clock line in some boards; not free for GPIO if driving flash. | Flash |
| IO13 | FSPIQ | Used for flash data output in certain configurations; avoid using as GPIO if connected to flash. | Flash |
| IO14 | FSPIWP | Used as flash write-protect/data line on some modules; not recommended for other usage. | Flash |
| IO15 | XTAL_32K_P | If an external 32 kHz crystal is used for RTC, this pin is dedicated to the crystal and cannot be used as GPIO. | Other |
| IO16 | XTAL_32K_N | If using an external 32 kHz crystal, this pin is connected to the crystal and should not be used as general I/O. | Other |
| IO19 | USB_D- | Used for USB communication; using this pin as general GPIO can interfere with USB functionality. | USB |
| IO20 | USB_D+ | Dedicated to USB interface; repurposing as GPIO may disrupt USB connectivity. | USB |
| IO26 | SPICS1 | Used to connect external PSRAM (or second SPI memory); should be avoided as GPIO if such memory is present. | Flash |
| IO29 | SPICS0 | Connected to external or embedded flash memory chip; not recommended for use as GPIO. | Flash |
| IO30 | SPICLK | Drives external or internal SPI flash clock; tied to flash operation, so not free for GPIO use. | Flash |
| IO31 | SPIQ | Used for SPI flash data; reserved for flash communications (embedded or external). | Flash |
| IO32 | SPID | Used for SPI flash data; reserved for flash communications (embedded or external). | Flash |
| IO33 | SPIHD | Connected to SPI flash (hold/data line); not available for general-purpose use. | Flash |
| IO34 | SPIWP | Connected to SPI flash (write-protect/data line); not recommended for other use. | Flash |
| IO35 | FSPID | Used by internal flash/PSRAM on some ESP32-S2 variants; avoid using as GPIO to prevent conflicts. | Flash |
| IO36 | FSPICLK | May be connected to internal flash or used for high-speed SPI; not intended for general GPIO use. | Flash |
| IO37 | FSPIQ | Used for internal flash/PSRAM data in some models; should not be repurposed for GPIO. | Flash |
| IO38 | FSPIWP | Reserved for flash/PSRAM in ESP32-S2 modules with internal memory; not recommended for general I/O. | Flash |
| IO39 | MTCK | Used for JTAG debugging interface; using this pin for other purposes will disable JTAG clock input. | Other |
| IO40 | MTDO | Part of JTAG interface (TDO); should be avoided as GPIO if JTAG debugging is needed. | Other |
| IO41 | MTDI | Part of JTAG interface (TDI); avoid using as GPIO to retain ability for JTAG debug. | Other |
| IO42 | MTMS | JTAG TMS pin; should not be repurposed if JTAG debugging or programming via JTAG is required. | Other |
| IO45 | GPIO45 | Must be set correctly at boot (usually low for 3.3 V); improper level can cause boot failure or flash malfunction. | Strapping |
| IO46 | GPIO46 | If pulled high during boot, it can disable bootloader log output (depending on eFuse settings). Cannot drive output (input-only pin). | Strapping |
ESP32-S2 modules & revisions
12 variants
ESP32-S2 boards
26 boards
